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f96a38347a0c6ab31fbb6200c13e684d1fee449c
Most of emulated CPU have instructions aligned on 16 or 32 bits, while on others GCC tries to align the target jump location. This means that 1/2 or 3/4 of tb_phys_hash entries are never used. Update the hash function tb_phys_hash_func() to ignore the two lowest bits of the address. This brings a 6% speed-up when booting a MIPS image. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Read the documentation in qemu-doc.html. Fabrice Bellard.
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