mirror of
https://github.com/mii443/tangprimer-riscv.git
synced 2025-08-22 16:25:39 +00:00
2601 lines
22 KiB
Plaintext
2601 lines
22 KiB
Plaintext
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[7]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[6]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[5]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[2]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[1]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.604
|
|
15.494
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[0]_s0
|
|
15.494
|
|
=====
|
|
SETUP
|
|
-4.537
|
|
15.428
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5401
|
|
11.252
|
|
11.769
|
|
mem0/mem_s5937
|
|
13.705
|
|
14.275
|
|
mem0/mem_s4992
|
|
14.276
|
|
14.738
|
|
mem0/mem_mem_RAMREG_24_G[2]_s0
|
|
15.428
|
|
=====
|
|
SETUP
|
|
-4.482
|
|
15.372
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6339
|
|
10.584
|
|
11.139
|
|
mem0/mem_s6061
|
|
12.224
|
|
12.595
|
|
mem0/mem_s5309
|
|
13.015
|
|
13.532
|
|
mem0/mem_s4605
|
|
14.823
|
|
15.372
|
|
mem0/mem_mem_RAMREG_18_G[5]_s0
|
|
15.372
|
|
=====
|
|
SETUP
|
|
-4.448
|
|
15.339
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6339
|
|
10.584
|
|
11.139
|
|
mem0/mem_s6061
|
|
12.224
|
|
12.595
|
|
mem0/mem_s5929
|
|
13.517
|
|
13.888
|
|
mem0/mem_s4986
|
|
13.892
|
|
14.354
|
|
mem0/mem_mem_RAMREG_18_G[5]_s0
|
|
15.339
|
|
=====
|
|
SETUP
|
|
-4.448
|
|
15.339
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6339
|
|
10.584
|
|
11.139
|
|
mem0/mem_s6061
|
|
12.224
|
|
12.595
|
|
mem0/mem_s5929
|
|
13.517
|
|
13.888
|
|
mem0/mem_s4986
|
|
13.892
|
|
14.354
|
|
mem0/mem_mem_RAMREG_18_G[1]_s0
|
|
15.339
|
|
=====
|
|
SETUP
|
|
-4.434
|
|
15.324
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6339
|
|
10.584
|
|
11.139
|
|
mem0/mem_s6063
|
|
12.718
|
|
13.273
|
|
mem0/mem_s5328
|
|
13.488
|
|
14.043
|
|
mem0/mem_s4614
|
|
14.775
|
|
15.324
|
|
mem0/mem_mem_RAMREG_19_G[6]_s0
|
|
15.324
|
|
=====
|
|
SETUP
|
|
-4.395
|
|
15.285
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5401
|
|
11.252
|
|
11.769
|
|
mem0/mem_s5937
|
|
13.705
|
|
14.275
|
|
mem0/mem_s4992
|
|
14.276
|
|
14.738
|
|
mem0/mem_mem_RAMREG_24_G[1]_s0
|
|
15.285
|
|
=====
|
|
SETUP
|
|
-4.315
|
|
15.206
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5463
|
|
11.252
|
|
11.769
|
|
mem0/mem_s5944
|
|
13.541
|
|
14.090
|
|
mem0/mem_s4998
|
|
14.091
|
|
14.661
|
|
mem0/mem_mem_RAMREG_30_G[1]_s0
|
|
15.206
|
|
=====
|
|
SETUP
|
|
-4.291
|
|
15.182
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6342
|
|
9.852
|
|
10.369
|
|
mem0/mem_s6203
|
|
11.679
|
|
12.234
|
|
mem0/mem_s5648
|
|
12.947
|
|
13.464
|
|
mem0/mem_s4811
|
|
14.633
|
|
15.182
|
|
mem0/mem_mem_RAMREG_44_G[3]_s0
|
|
15.182
|
|
=====
|
|
SETUP
|
|
-4.262
|
|
15.153
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s6068
|
|
10.425
|
|
10.796
|
|
mem0/mem_s5725
|
|
11.918
|
|
12.289
|
|
mem0/mem_s5974
|
|
13.538
|
|
14.108
|
|
mem0/mem_s5019
|
|
14.110
|
|
14.572
|
|
mem0/mem_mem_RAMREG_51_G[7]_s0
|
|
15.153
|
|
=====
|
|
SETUP
|
|
-4.262
|
|
15.153
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s6068
|
|
10.425
|
|
10.796
|
|
mem0/mem_s5725
|
|
11.918
|
|
12.289
|
|
mem0/mem_s5974
|
|
13.538
|
|
14.108
|
|
mem0/mem_s5019
|
|
14.110
|
|
14.572
|
|
mem0/mem_mem_RAMREG_51_G[3]_s0
|
|
15.153
|
|
=====
|
|
SETUP
|
|
-4.258
|
|
15.149
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s6068
|
|
10.425
|
|
10.796
|
|
mem0/mem_s5725
|
|
11.918
|
|
12.289
|
|
mem0/mem_s5974
|
|
13.538
|
|
14.108
|
|
mem0/mem_s5019
|
|
14.110
|
|
14.572
|
|
mem0/mem_mem_RAMREG_51_G[5]_s0
|
|
15.149
|
|
=====
|
|
SETUP
|
|
-4.254
|
|
15.145
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6339
|
|
10.584
|
|
11.139
|
|
mem0/mem_s6071
|
|
12.794
|
|
13.165
|
|
mem0/mem_s5366
|
|
13.874
|
|
14.423
|
|
mem0/mem_s4632
|
|
14.596
|
|
15.145
|
|
mem0/mem_mem_RAMREG_22_G[0]_s0
|
|
15.145
|
|
=====
|
|
SETUP
|
|
-4.249
|
|
15.140
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n65_s4
|
|
4.391
|
|
4.946
|
|
mem0/n54_s4
|
|
5.412
|
|
5.929
|
|
mem0/n53_s4
|
|
6.383
|
|
6.938
|
|
mem0/n52_s3
|
|
7.335
|
|
7.905
|
|
mem0/n51_s3
|
|
7.905
|
|
7.940
|
|
mem0/n50_s3
|
|
7.940
|
|
7.976
|
|
mem0/n49_s3
|
|
7.976
|
|
8.011
|
|
mem0/n48_s3
|
|
8.011
|
|
8.046
|
|
mem0/n47_s3
|
|
8.046
|
|
8.081
|
|
mem0/n46_s2
|
|
8.081
|
|
8.116
|
|
mem0/mem_s6342
|
|
9.852
|
|
10.369
|
|
mem0/mem_s6173
|
|
12.492
|
|
13.047
|
|
mem0/mem_s5608
|
|
13.482
|
|
13.935
|
|
mem0/mem_s4783
|
|
14.591
|
|
15.140
|
|
mem0/mem_mem_RAMREG_40_G[7]_s0
|
|
15.140
|
|
=====
|
|
SETUP
|
|
-4.226
|
|
15.117
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5246
|
|
12.251
|
|
12.622
|
|
mem0/mem_s5920
|
|
13.835
|
|
14.206
|
|
mem0/mem_s4981
|
|
14.210
|
|
14.537
|
|
mem0/mem_mem_RAMREG_13_G[5]_s0
|
|
15.117
|
|
=====
|
|
SETUP
|
|
-4.226
|
|
15.117
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5246
|
|
12.251
|
|
12.622
|
|
mem0/mem_s5920
|
|
13.835
|
|
14.206
|
|
mem0/mem_s4981
|
|
14.210
|
|
14.537
|
|
mem0/mem_mem_RAMREG_13_G[3]_s0
|
|
15.117
|
|
=====
|
|
SETUP
|
|
-4.226
|
|
15.117
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5246
|
|
12.251
|
|
12.622
|
|
mem0/mem_s5920
|
|
13.835
|
|
14.206
|
|
mem0/mem_s4981
|
|
14.210
|
|
14.537
|
|
mem0/mem_mem_RAMREG_13_G[0]_s0
|
|
15.117
|
|
=====
|
|
SETUP
|
|
-4.204
|
|
15.095
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5264
|
|
12.531
|
|
13.086
|
|
mem0/mem_s5923
|
|
13.623
|
|
14.193
|
|
mem0/mem_s4983
|
|
14.195
|
|
14.765
|
|
mem0/mem_mem_RAMREG_15_G[4]_s0
|
|
15.095
|
|
=====
|
|
SETUP
|
|
-4.198
|
|
15.089
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s6068
|
|
10.425
|
|
10.796
|
|
mem0/mem_s5725
|
|
11.918
|
|
12.289
|
|
mem0/mem_s5974
|
|
13.538
|
|
14.108
|
|
mem0/mem_s5019
|
|
14.110
|
|
14.572
|
|
mem0/mem_mem_RAMREG_51_G[6]_s0
|
|
15.089
|
|
=====
|
|
SETUP
|
|
-4.185
|
|
15.076
|
|
10.891
|
|
clock_ibuf
|
|
0.000
|
|
0.683
|
|
core0/reg_raddr_4_s0
|
|
0.926
|
|
1.158
|
|
mem0/mem_s5980
|
|
2.326
|
|
2.881
|
|
mem0/n107_s5
|
|
4.580
|
|
5.033
|
|
mem0/n104_s5
|
|
5.606
|
|
6.155
|
|
mem0/n102_s5
|
|
6.333
|
|
6.903
|
|
mem0/n101_s3
|
|
7.076
|
|
7.646
|
|
mem0/n100_s3
|
|
7.646
|
|
7.681
|
|
mem0/n99_s3
|
|
7.681
|
|
7.716
|
|
mem0/n98_s3
|
|
7.716
|
|
7.751
|
|
mem0/n97_s3
|
|
7.751
|
|
7.786
|
|
mem0/n96_s3
|
|
7.786
|
|
7.822
|
|
mem0/n95_s3
|
|
7.822
|
|
7.857
|
|
mem0/n94_s3
|
|
7.857
|
|
7.892
|
|
mem0/n93_s3
|
|
7.892
|
|
7.927
|
|
mem0/n92_s3
|
|
7.927
|
|
7.962
|
|
mem0/n91_s3
|
|
7.962
|
|
7.998
|
|
mem0/n90_s3
|
|
7.998
|
|
8.033
|
|
mem0/n89_s3
|
|
8.033
|
|
8.068
|
|
mem0/n88_s3
|
|
8.068
|
|
8.103
|
|
mem0/n87_s3
|
|
8.103
|
|
8.138
|
|
mem0/n86_s3
|
|
8.138
|
|
8.174
|
|
mem0/n85_s3
|
|
8.174
|
|
8.209
|
|
mem0/n84_s3
|
|
8.209
|
|
8.244
|
|
mem0/n83_s3
|
|
8.244
|
|
8.279
|
|
mem0/n82_s3
|
|
8.279
|
|
8.314
|
|
mem0/n81_s2
|
|
8.314
|
|
8.350
|
|
mem0/mem_s5990
|
|
10.077
|
|
10.530
|
|
mem0/mem_s5401
|
|
11.252
|
|
11.769
|
|
mem0/mem_s5937
|
|
13.705
|
|
14.275
|
|
mem0/mem_s4992
|
|
14.276
|
|
14.738
|
|
mem0/mem_mem_RAMREG_24_G[5]_s0
|
|
15.076
|
|
=====
|
|
HOLD
|
|
0.346
|
|
1.323
|
|
0.978
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/rs2_4_s0
|
|
0.860
|
|
1.062
|
|
core0/register_register_0_0_s
|
|
1.323
|
|
=====
|
|
HOLD
|
|
0.359
|
|
1.337
|
|
0.978
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/rd_0_s0
|
|
0.860
|
|
1.062
|
|
core0/register_register_0_0_s
|
|
1.337
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_0_s1
|
|
0.860
|
|
1.062
|
|
core0/n586_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_0_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_3_s1
|
|
0.860
|
|
1.062
|
|
core0/n580_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_3_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_5_s1
|
|
0.860
|
|
1.062
|
|
core0/n576_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_5_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_6_s1
|
|
0.860
|
|
1.062
|
|
core0/n574_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_6_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_7_s1
|
|
0.860
|
|
1.062
|
|
core0/n572_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_7_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_9_s1
|
|
0.860
|
|
1.062
|
|
core0/n568_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_9_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_11_s1
|
|
0.860
|
|
1.062
|
|
core0/n564_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_11_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_12_s1
|
|
0.860
|
|
1.062
|
|
core0/n562_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_12_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_13_s1
|
|
0.860
|
|
1.062
|
|
core0/n560_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_13_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_14_s1
|
|
0.860
|
|
1.062
|
|
core0/n558_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_14_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_23_s1
|
|
0.860
|
|
1.062
|
|
core0/n540_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_23_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_25_s1
|
|
0.860
|
|
1.062
|
|
core0/n536_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_25_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
core0/alu_out_27_s1
|
|
0.860
|
|
1.062
|
|
core0/n532_s5
|
|
1.064
|
|
1.296
|
|
core0/alu_out_27_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/led_flag_s1
|
|
0.860
|
|
1.062
|
|
uart0/n79_s2
|
|
1.064
|
|
1.296
|
|
uart0/led_flag_s1
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_2_s0
|
|
0.860
|
|
1.062
|
|
uart0/n44_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_2_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_6_s0
|
|
0.860
|
|
1.062
|
|
uart0/n40_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_6_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_8_s0
|
|
0.860
|
|
1.062
|
|
uart0/n38_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_8_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_12_s0
|
|
0.860
|
|
1.062
|
|
uart0/n34_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_12_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_14_s0
|
|
0.860
|
|
1.062
|
|
uart0/n32_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_14_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_18_s0
|
|
0.860
|
|
1.062
|
|
uart0/n28_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_18_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_20_s0
|
|
0.860
|
|
1.062
|
|
uart0/n26_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_20_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_24_s0
|
|
0.860
|
|
1.062
|
|
uart0/n22_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_24_s0
|
|
1.296
|
|
=====
|
|
HOLD
|
|
0.425
|
|
1.296
|
|
0.871
|
|
clock_ibuf
|
|
0.000
|
|
0.675
|
|
uart0/clock_count_26_s0
|
|
0.860
|
|
1.062
|
|
uart0/n20_s
|
|
1.064
|
|
1.296
|
|
uart0/clock_count_26_s0
|
|
1.296
|