From 61c5bf2311aa33804fb6a7dbe138b545c7c88f0a Mon Sep 17 00:00:00 2001 From: mii Date: Thu, 18 May 2023 14:53:59 +0900 Subject: [PATCH] lw --- cpu.gprj | 1 + impl/gwsynthesis/cpu.log | 10 +- impl/gwsynthesis/cpu.prj | 1 + impl/gwsynthesis/cpu.vg | 29250 +++++++++++++++++---- impl/gwsynthesis/cpu_syn.rpt.html | 2391 +- impl/gwsynthesis/cpu_syn_resource.html | 18 +- impl/gwsynthesis/cpu_syn_rsc.xml | 6 +- impl/pnr/cpu.bin | Bin 577178 -> 907418 bytes impl/pnr/cpu.binx | Bin 577636 -> 907876 bytes impl/pnr/cpu.db | Bin 28248 -> 139408 bytes impl/pnr/cpu.fs | 2732 +- impl/pnr/cpu.log | 2 +- impl/pnr/cpu.pin.html | 2 +- impl/pnr/cpu.power.html | 40 +- impl/pnr/cpu.rpt.html | 48 +- impl/pnr/cpu.rpt.txt | 39 +- impl/pnr/cpu.timing_paths | 2968 ++- impl/pnr/cpu_tr_cata.html | 4 +- impl/pnr/cpu_tr_content.html | 20438 ++++++++++----- impl/temp/rtl_parser.result | 2 +- impl/temp/rtl_parser_arg.json | 4 + src/core.v | 32 +- src/defs.vh | 2 + src/memory.v | 2 +- src/tb_memory.o | 785 +- src/tb_memory.vcd | 31229 +++++++---------------- 26 files changed, 54155 insertions(+), 35851 deletions(-) create mode 100644 src/defs.vh diff --git a/cpu.gprj b/cpu.gprj index e307f2c..98ff914 100644 --- a/cpu.gprj +++ b/cpu.gprj @@ -6,6 +6,7 @@ gw2a18c-011 + diff --git a/impl/gwsynthesis/cpu.log b/impl/gwsynthesis/cpu.log index bc09e89..c6222d9 100644 --- a/impl/gwsynthesis/cpu.log +++ b/impl/gwsynthesis/cpu.log @@ -4,14 +4,18 @@ Analyzing Verilog file 'C:\Users\kuroc\Downloads\cpu\src\memory.v' Analyzing Verilog file 'C:\Users\kuroc\Downloads\cpu\src\top.v' Analyzing Verilog file 'C:\Users\kuroc\Downloads\cpu\src\uart.v' Analyzing Verilog file 'C:\Users\kuroc\Downloads\cpu\src\core.v' +Analyzing included file 'C:\Users\kuroc\Downloads\cpu\src\defs.vh'("C:\Users\kuroc\Downloads\cpu\src\core.v":1) +Back to file 'C:\Users\kuroc\Downloads\cpu\src\core.v'("C:\Users\kuroc\Downloads\cpu\src\core.v":1) +Analyzing Verilog file 'C:\Users\kuroc\Downloads\cpu\src\defs.vh' Compiling module 'TOP'("C:\Users\kuroc\Downloads\cpu\src\top.v":1) Compiling module 'UART'("C:\Users\kuroc\Downloads\cpu\src\uart.v":1) WARN (EX3791) : Expression size 5 truncated to fit in target size 4("C:\Users\kuroc\Downloads\cpu\src\uart.v":98) Compiling module 'MEMORY'("C:\Users\kuroc\Downloads\cpu\src\memory.v":1) Extracting RAM for identifier 'mem'("C:\Users\kuroc\Downloads\cpu\src\memory.v":13) -Compiling module 'CORE'("C:\Users\kuroc\Downloads\cpu\src\core.v":1) -Extracting RAM for identifier 'register'("C:\Users\kuroc\Downloads\cpu\src\core.v":17) -WARN (EX3791) : Expression size 32 truncated to fit in target size 21("C:\Users\kuroc\Downloads\cpu\src\core.v":102) +WARN (EX3784) : Index 33 is out of range [32:0] for 'mem'("C:\Users\kuroc\Downloads\cpu\src\memory.v":19) +Compiling module 'CORE'("C:\Users\kuroc\Downloads\cpu\src\core.v":3) +Extracting RAM for identifier 'register'("C:\Users\kuroc\Downloads\cpu\src\core.v":19) +WARN (EX3791) : Expression size 32 truncated to fit in target size 21("C:\Users\kuroc\Downloads\cpu\src\core.v":101) NOTE (EX0101) : Current top module is "TOP" [5%] Running netlist conversion ... Running device independent optimization ... diff --git a/impl/gwsynthesis/cpu.prj b/impl/gwsynthesis/cpu.prj index aab8109..334d555 100644 --- a/impl/gwsynthesis/cpu.prj +++ b/impl/gwsynthesis/cpu.prj @@ -8,6 +8,7 @@ +