Vikram Garhwal 32dbebcc7e hw/net/can: Introduce Xilinx Versal CANFD controller ...

The Xilinx Versal CANFD controller is developed based on SocketCAN, QEMU CAN bus
implementation. Bus connection and socketCAN connection for each CAN module
can be set through command lines.

Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2023-06-06 10:19:30 +01:00

..

can_kvaser_pci.c

include/hw/pci: Split pci_device.h off pci.h

2023-01-08 01:54:22 -05:00

can_mioe3680_pci.c

include/hw/pci: Split pci_device.h off pci.h

2023-01-08 01:54:22 -05:00

can_pcm3680_pci.c

include/hw/pci: Split pci_device.h off pci.h

2023-01-08 01:54:22 -05:00

can_sja1000.c

treewide: Remove the unnecessary space before semicolon

2022-10-24 13:41:10 +02:00

can_sja1000.h

hw/net/can: Make CanBusClientInfo::can_receive() return a boolean

2020-03-31 21:14:35 +08:00

ctu_can_fd_frame.h

net: Replace TAB indentations with spaces

2022-11-11 09:39:03 +01:00

ctu_can_fd_regs.h

net: Replace TAB indentations with spaces

2022-11-11 09:39:03 +01:00

ctucan_core.c

Remove unnecessary minimum_version_id_old fields

2022-01-28 15:38:23 +01:00

ctucan_core.h

Replace config-time define HOST_WORDS_BIGENDIAN

2022-04-06 10:50:37 +02:00

ctucan_pci.c

include/hw/pci: Split pci_device.h off pci.h

2023-01-08 01:54:22 -05:00

meson.build

hw/net/can: Introduce Xilinx Versal CANFD controller

2023-06-06 10:19:30 +01:00

trace-events

hw/net/can: Introduce Xilinx Versal CANFD controller

2023-06-06 10:19:30 +01:00

trace.h

hw/net/can: Introduce Xilinx ZynqMP CAN controller

2020-12-10 11:30:44 +00:00

xlnx-versal-canfd.c

hw/net/can: Introduce Xilinx Versal CANFD controller

2023-06-06 10:19:30 +01:00

xlnx-zynqmp-can.c

hw/net/can: fix Xilinx ZynqMP CAN RX FIFO logic

2022-09-22 16:38:26 +01:00