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target/xtensa fixes for 5.1: - fix access to special registers missing in the core configuration; - fix simcall opcode behavior for new hardware; - drop gen_io_end call from xtensa translator. # gpg: Signature made Thu 25 Jun 2020 09:08:58 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20200625-xtensa: target/xtensa: drop gen_io_end call target/xtensa: fix simcall for newer hardware target/xtensa: fetch HW version from configuration overlay target/xtensa: work around missing SR definitions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>