Mark Cave-Ayland c9a464420d target-sparc: implement NPT timer bit ...

If the NPT bit is set in the timer register, all non-supervisor read accesses
to the register should fail with a privilege exception.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

2016-01-07 12:21:06 +00:00

..

cc_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

cpu-qom.h

softmmu: make do_unaligned_access a method of CPU

2014-06-05 16:10:31 +02:00

cpu.c

disas: QOMify sparc specific disas setup

2015-10-22 15:49:40 +02:00

cpu.h

sun4u: split out NPT and INT_DIS into separate CPUTimer fields

2016-01-07 12:20:53 +00:00

fop_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

gdbstub.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

helper.c

target-sparc: implement NPT timer bit

2016-01-07 12:21:06 +00:00

helper.h

target-sparc: implement NPT timer bit

2016-01-07 12:21:06 +00:00

int32_helper.c

exec: Change cpu_abort() argument to CPUState

2014-03-13 19:52:28 +01:00

int64_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

ldst_helper.c

target-sparc: is_translating_asi() is TARGET_SPARC64 only

2015-01-21 16:18:01 +00:00

machine.c

cputlb: Change tlb_flush() argument to CPUState

2014-03-13 19:52:47 +01:00

Makefile.objs

monitor: remove target-specific code from monitor.c

2015-09-16 17:33:32 +02:00

mmu_helper.c

tlb: Add "ifetch" argument to cpu_mmu_index()

2015-09-11 08:15:28 -07:00

monitor.c

monitor: remove target-specific code from monitor.c

2015-09-16 17:33:32 +02:00

TODO

…

translate.c

target-sparc: implement NPT timer bit

2016-01-07 12:21:06 +00:00

vis_helper.c

target-sparc: fix 32-bit truncation in fpackfix

2015-11-26 16:47:44 +01:00

win_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00