Peter Maydell be1f13ac9d Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150813' into staging ...

MIPS patches 2015-08-13

Changes:
* mips32r5-generic CPU updated and renamed to P5600
* improvements in LWL/LDL, logging and fulong2e

# gpg: Signature made Thu 13 Aug 2015 17:10:59 BST using RSA key ID 0B29DA6B
# gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4  4FC0 5211 8E3C 0B29 DA6B

* remotes/lalrae/tags/mips-20150813:
  target-mips: Use CPU_LOG_INT for logging related to interrupts
  hw/pci-host/bonito: Avoid buffer overrun for bad LDMA/COP accesses
  target-mips: simplify LWL/LDL mask generation
  target-mips: update mips32r5-generic into P5600

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2015-08-13 17:47:44 +01:00

..

apb.c

Switch non-CPU callers from ld/st*_phys to address_space_ld/st*

2015-04-26 16:49:24 +01:00

bonito.c

hw/pci-host/bonito: Avoid buffer overrun for bad LDMA/COP accesses

2015-08-13 16:22:53 +01:00

gpex.c

pci: Add generic PCIe host bridge

2015-02-13 05:46:07 +00:00

grackle.c

pci: Trivial device model conversions to realize

2015-02-26 12:42:16 +01:00

Makefile.objs

pci: Add generic PCIe host bridge

2015-02-13 05:46:07 +00:00

pam.c

hw/i386: remove smram_update

2015-06-05 17:36:39 +02:00

piix.c

piix: Document coreboot-specific RAM size config register

2015-08-13 14:08:25 +03:00

ppce500.c

pci: Trivial device model conversions to realize

2015-02-26 12:42:16 +01:00

prep.c

exec.c: Make address_space_rw take transaction attributes

2015-04-26 16:49:24 +01:00

q35.c

q35: implement TSEG

2015-06-05 19:45:13 +02:00

uninorth.c

uninorth: convert ffs(3) to ctz32()

2015-04-28 15:36:08 +02:00

versatile.c

pci: Trivial device model conversions to realize

2015-02-26 12:42:16 +01:00