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36027c70974fef1392e6c73dfb94c3f94f0930bc
qemu/target/avr
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Richard Henderson 36027c7097 target/avr: Disable interrupts when env->skip set 
This bit is not saved across interrupts, so we must
delay delivering the interrupt until the skip has
been processed.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1118
Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-09-01 06:42:21 +01:00
..
cpu-param.h
…
cpu-qom.h
Clean up header guards that don't match their file name
2022-05-11 16:49:06 +02:00
cpu.c
target/avr: Drop avr_cpu_memory_rw_debug()
2022-06-20 13:11:36 -07:00
cpu.h
target/avr: Drop avr_cpu_memory_rw_debug()
2022-06-20 13:11:36 -07:00
disas.c
meson: target
2020-08-21 06:30:35 -04:00
gdbstub.c
target/avr: Implement gdb_adjust_breakpoint
2021-07-21 07:47:05 -10:00
helper.c
target/avr: Disable interrupts when env->skip set
2022-09-01 06:42:21 +01:00
helper.h
target/avr: Mark some helpers noreturn
2021-07-09 09:42:28 -07:00
insn.decode
target/avr: Add instruction translation - MCU Control Instructions
2020-07-11 11:02:05 +02:00
Kconfig
meson: Introduce target-specific Kconfig
2021-07-09 18:21:34 +02:00
machine.c
cpu: Move AVR target vmsd field from CPUClass to DeviceClass
2021-05-26 15:33:59 -07:00
meson.build
meson: target
2020-08-21 06:30:35 -04:00
translate.c
target/avr: Disable interrupts when env->skip set
2022-09-01 06:42:21 +01:00