mii/qemu
1
0
Fork 0
mirror of https://github.com/mii443/qemu.git synced 2025-12-16 17:18:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
Files
336e91f85332dda0ede4c1d15b87a19a0fb898a2
qemu/target
History
Richard Henderson 336e91f853 target/ppc: Move SPR_DSISR setting to powerpc_excp 
By doing this while sending the exception, we will have already
done the unwinding, which makes the ppc_cpu_do_unaligned_access
code a bit cleaner.

Update the comment about the expected instruction format.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 07:00:52 -04:00
..
alpha
target/alpha: Implement alpha_cpu_record_sigbus
2021-11-02 07:00:52 -04:00
arm
target/arm: Implement arm_cpu_record_sigbus
2021-11-02 07:00:52 -04:00
avr
target/avr: Drop checks for singlestep_enabled
2021-10-15 16:39:14 -07:00
cris
target/cris: Make cris_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
hexagon
target/hexagon: Remove hexagon_cpu_tlb_fill
2021-11-02 07:00:52 -04:00
hppa
target/hppa: Make hppa_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
i386
target/i386: Implement x86_cpu_record_sigsegv
2021-11-02 07:00:52 -04:00
m68k
target/m68k: Make m68k_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
microblaze
target/microblaze: Do not set MO_ALIGN for user-only
2021-11-02 07:00:52 -04:00
mips
target/mips: Make mips_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
nios2
target/nios2: Implement nios2_cpu_record_sigsegv
2021-11-02 07:00:52 -04:00
openrisc
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
ppc
target/ppc: Move SPR_DSISR setting to powerpc_excp
2021-11-02 07:00:52 -04:00
riscv
target/riscv: Make riscv_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
rx
target/rx: Drop checks for singlestep_enabled
2021-10-15 16:39:14 -07:00
s390x
target/s390x: Implement s390_cpu_record_sigsegv
2021-11-02 07:00:52 -04:00
sh4
target/sh4: Make sh4_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
sparc
target/sparc: Make sparc_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
tricore
target/tricore: Drop check for singlestep_enabled
2021-10-15 16:39:14 -07:00
xtensa
target/xtensa: Make xtensa_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
Kconfig
meson: Introduce target-specific Kconfig
2021-07-09 18:21:34 +02:00
meson.build
Drop the deprecated unicore32 target
2021-05-12 18:20:52 +02:00