Philippe Mathieu-Daudé 08d8bf4fe3 hw/isa/i82378: Rename output IRQ as 'cpu_intr' ...

Commit a04ff94097 ("prep: Add i82378 PCI-to-ISA bridge
emulation") aimed to model the 2 output IRQs: CPU intr
and NMI. Commit 5039d6e235 ("i8257: remove cpu_request_exit
irq") removed the NMI IRQ.
Since this model only use the CPU interrupt, replace the
'out[2]' array by a single 'cpu_intr'.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230210163744.32182-3-philmd@linaro.org>

2023-02-27 22:29:01 +01:00

..

apm.c

nomaintainer: Fix Lesser GPL version number

2020-11-15 17:04:40 +01:00

i82378.c

hw/isa/i82378: Rename output IRQ as 'cpu_intr'

2023-02-27 22:29:01 +01:00

isa-bus.c

hw/isa/isa-bus: Turn isa_build_aml() into qbus_build_aml()

2023-01-27 11:47:02 -05:00

isa-superio.c

Do not include sysemu/sysemu.h if it's not really necessary

2021-05-02 17:24:50 +02:00

Kconfig

hw/isa/Kconfig: Add missing dependency to VT82C686

2023-01-08 01:54:21 -05:00

lpc_ich9.c

hw: Move ich9.h to southbridge/

2023-02-27 22:29:01 +01:00

meson.build

meson: convert hw/isa

2020-08-21 06:30:29 -04:00

pc87312.c

pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312

2020-09-09 13:20:22 -04:00

piix3.c

hw/isa/isa-bus: Turn isa_build_aml() into qbus_build_aml()

2023-01-27 11:47:02 -05:00

piix4.c

hw/usb/hcd-uhci: Introduce TYPE_ defines for device models

2023-01-13 16:22:57 +01:00

smc37c669-superio.c

hw/isa/superio: Correct the license text

2020-04-01 19:00:16 +02:00

trace-events

hw/isa: add trace events for ICH9 LPC chip config access

2022-12-21 06:35:28 -05:00

trace.h

trace: switch position of headers to what Meson requires

2020-08-21 06:18:24 -04:00

vt82c686.c

hw/isa/vt82c686: Create rtc-time alias in boards instead

2022-10-31 11:32:07 +01:00