ec150c7e09
include: Make headers more self-contained
...
Back in 2016, we discussed[1] rules for headers, and these were
generally liked:
1. Have a carefully curated header that's included everywhere first. We
got that already thanks to Peter: osdep.h.
2. Headers should normally include everything they need beyond osdep.h.
If exceptions are needed for some reason, they must be documented in
the header. If all that's needed from a header is typedefs, put
those into qemu/typedefs.h instead of including the header.
3. Cyclic inclusion is forbidden.
This patch gets include/ closer to obeying 2.
It's actually extracted from my "[RFC] Baby steps towards saner
headers" series[2], which demonstrates a possible path towards
checking 2 automatically. It passes the RFC test there.
[1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org >
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
[2] Message-Id: <20190711122827.18970-1-armbru@redhat.com >
https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html
Signed-off-by: Markus Armbruster <armbru@redhat.com >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Message-Id: <20190812052359.30071-2-armbru@redhat.com >
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com >
2019-08-16 13:31:51 +02:00
a7519f2b39
mips: malta/boston: replace cpu_model with cpu_type
...
Signed-off-by: Igor Mammedov <imammedo@redhat.com >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Message-Id: <1507211474-188400-37-git-send-email-imammedo@redhat.com >
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com >
2017-10-27 16:04:28 +02:00
19494f811a
hw/mips/cps: create GIC block inside CPS
...
Add GIC to CPS and expose its interrupt pins instead of CPU's.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com >
2016-07-12 09:10:13 +01:00
408294352a
hw/mips/cps: enable ITU for multithreading processors
...
Make ITU available in the system if CPU supports multithreading
and is part of CPS.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com >
2016-03-30 09:14:00 +01:00
2edd5261ff
hw/mips/cps: create CPC block inside CPS
...
Create Cluster Power Controller and add a link to the CPC MemoryRegion
in GCR. Guest can enable / map CPC to any physical address by writing to
the memory-mapped GCR_CPC_BASE register.
Set vp-start-reset property to 1 to allow only first VP to run from reset.
Others are brought up by the guest via CPC memory-mapped registers.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com >
2016-03-30 09:13:59 +01:00
a9bd9b5a86
hw/mips/cps: create GCR block inside CPS
...
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com >
2016-03-30 09:13:59 +01:00
8e7e8a5b7b
hw/mips: implement generic MIPS Coherent Processing System container
...
Implement generic MIPS Coherent Processing System (CPS) which in this
commit just creates VPs, but it will serve as a container also for
other components like Global Configuration Registers and Cluster Power
Controller.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com >
2016-03-30 09:13:58 +01:00
