af1bbf30c4
target-arm: Fix VQMOVUN Neon instruction.
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VQMOVUN does a signed-to-unsigned saturating conversion. This is
different from both the signed-to-signed and unsigned-to-unsigned
conversions already implemented, so we need a new set of helper
functions (neon_unarrow_sat*).
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net >
2011-02-09 19:37:47 +01:00
72902672dc
Set the right overflow bit for neon 32 and 64 bit saturating add/sub.
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Signed-off-by: Christophe Lyon <christophe.lyon@st.com >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net >
2011-02-04 20:57:41 +01:00
4ca4502c93
ARM: add neon helpers for VQSHLU
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Add neon helper functions to implement VQSHLU, which is a
signed-to-unsigned version of VQSHL available only as an
immediate form.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com >
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net >
2011-01-12 00:06:06 +01:00
426f5abcaa
ARM atomic ops rewrite
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Implement ARMv6 atomic ops (ldrex/strex) using the same trick as PPC.
Signed-off-by: Paul Brook <paul@codesourcery.com >
2009-11-22 21:35:13 +00:00
600114988c
ARM FP16 support
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Implement the ARM VFP half precision floating point extensions.
Signed-off-by: Paul Brook <paul@codesourcery.com >
2009-11-19 16:45:20 +00:00
f669df275c
target-arm: use native tcg-ops for ror/bic/vorn
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Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com >
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net >
2009-10-27 09:46:27 +01:00
194576157a
target-arm: convert NEON VZIP/VUZP/VTRN helper functions to pure TCG
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The neon_trn_u8, neon_trn_u16, neon_unzip_u8, neon_zip_u8 and neon_zip_u16
helpers used fixed registers to return values. This patch replaces that with
TCG code, so T0/T1 is no longer directly used by the helper functions.
Bugs in the gen_neon_unzip register load code were also fixed.
Signed-off-by: Filip Navara <filip.navara@gmail.com >
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net >
2009-10-17 23:52:17 +02:00
fe1479c3ad
Implement (very) basic Thumb2-EE support. This doesn't actually implement
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EE state, just the associated system coprocessor registers. It is sufficient
to keep OS setup and context switching code happy.
Signed-off-by: Paul Brook <paul@codesourcery.com >
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6104 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 13:18:36 +00:00
a7812ae412
TCG variable type checking.
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Signed-off-by: Paul Brook <paul@codesourcery.com >
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
e677137d99
ARM TCG conversion 15/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4152 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:49:05 +00:00
ad69471ce5
ARM TCG conversion 14/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:48:30 +00:00
8f8e3aa451
ARM TCG conversion 13/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:48:01 +00:00
8984bd2e83
ARM TCG conversion 12/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:48 +00:00
5e3f878ad6
ARM TCG conversion 11/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:34 +00:00
4373f3ceeb
ARM TCG conversion 10/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:19 +00:00
b010980544
ARM TCG conversion 9/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:03 +00:00
d9ba48308d
ARM TCG conversion 8/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4145 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:50 +00:00
6ddbc6e4cf
ARM TCG conversion 7/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:33 +00:00
3670669ce2
ARM TCG conversion 6/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:19 +00:00
1497c961af
ARM TCG conversion 4/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:45:50 +00:00
f51bbbfefe
ARM TCG conversion 2/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:45:13 +00:00
b26eefb68e
ARM TCG conversion 1/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:44:26 +00:00