4 Commits

Author	SHA1	Message	Date
Richard Henderson	fdefe51c28	Emit debug_insn for CPU_LOG_TB_OP_OPT as well. ... For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>	2012-09-27 21:38:50 +02:00
Jia Liu	4dd044c6ba	target-or32: Add system instructions ... Add OpenRISC system instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>	2012-07-27 21:13:03 +00:00
Jia Liu	bbe418f25d	target-or32: Add instruction translation ... Add OpenRISC instruction tanslation routines. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>	2012-07-27 21:13:00 +00:00
Jia Liu	e67db06e9f	target-or32: Add target stubs and QOM cpu ... Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>	2012-07-27 21:12:55 +00:00