a3ffaf3060
Fix microSPARC II SFSR mask (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 16:13:51 +00:00
375ee38b4b
Convert Sparc64 trap state ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 17:59:48 +00:00
7e8c2b6ca8
Convert float helpers to TCG, fix fabsq in the process
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 20:00:18 +00:00
dcf2490568
Convert fmovr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4013 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 19:56:06 +00:00
ccd4a21937
Convert tick operations to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:28:06 +00:00
00f219bf50
Convert movr and (partially) movcc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4010 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:25:27 +00:00
38bc628b08
Convert addx, subx, next_insn and mov_pc_npc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:22:19 +00:00
b25deda7ca
Temporary fix for i386 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-27 17:44:03 +00:00
1a2fb1c009
Modify Sparc32/64 to use TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 14:10:06 +00:00
9e31b9e28a
Fix remote debugger memory access problems reported by Matthias Stein
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-14 17:46:44 +00:00
3deaeab717
Sparc32 MMU register fixes (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 18:27:33 +00:00
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
2382dc6b9b
Fix floating point register decoding
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 20:27:35 +00:00
1f58732916
128-bit float support for user mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
7d77bf2006
More Sparc64 CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 09:32:02 +00:00
406f82e833
More CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3559 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 19:08:43 +00:00
6d5f237a59
CPU specific boot mode (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
8f577d3d29
Enable all alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:34:57 +00:00
6f27aba62e
Sparc64 hypervisor mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 17:07:21 +00:00
952a328ff5
SuperSparc MXCC support (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 16:29:21 +00:00
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
90251fb96e
Fix taddcctv and tsubcctv (David Matthews)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3379 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-10 19:11:54 +00:00
0387d92875
Fix Sparc64 ldfa/stfa and float ops with fpr >= 32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03 17:46:29 +00:00
3391c81801
Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 19:38:12 +00:00
ee0b03fd85
Fix Sparc64 wrasr instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3297 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 16:37:00 +00:00
40ce0a9a8f
CPU boot mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 19:44:09 +00:00
81ad8ba242
Rework ASI instructions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21 19:10:53 +00:00
0f8a249a0b
Detabify
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 14:54:22 +00:00
5fafdf24ef
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ce62e5ba09
Fix tb->size mishandling, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
6ea4a6c875
More alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3060 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11 16:43:30 +00:00
1ad21e6969
Save state in Sparc64 return op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3054 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-08 19:48:40 +00:00
dc011987f2
Use unsigned 32-bit load for ld/lduw
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3051 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:50:33 +00:00
6ef905f69c
Fix wrong number of clean/saveable windows, match Linux startup register values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:48:42 +00:00
46d38ba89d
Fix Sparc64 movr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3045 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-04 20:22:35 +00:00
46525e1fbe
Drop unused parameters
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3022 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 19:52:58 +00:00
2f2ecb83d7
Fix Sparc64 prefetcha op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2978 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-10 20:26:38 +00:00
20c9f095c4
Implement Sparc64 CPU timers using ptimers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-25 18:50:28 +00:00
6c36d3fa86
Enable faults for unassigned memory accesses and unimplemented ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-17 19:30:10 +00:00
2371aaa295
Fix pc/npc for unaligned load/stores, maybe other exceptions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2780 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 17:01:15 +00:00
5ef62c5c42
More Sparc32 CPUs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2744 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:54:32 +00:00
32af58f95f
Fix CPU type zapped by system_reset
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2743 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:49:15 +00:00
e9ebed4d41
Sparc64 update: more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 19:14:52 +00:00
a68156d016
Constification
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2711 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 12:45:28 +00:00
3299908c83
Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2656 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:49:56 +00:00
d2889a3efc
Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:46:16 +00:00
9b3c35e0e6
cpu_get_phys_page_debug should return target_phys_addr_t
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instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
417454b032
Full implementation of IEEE exceptions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 20:03:29 +00:00
