0b9f9b63c2
target/tricore: Add DISABLE insn variant
...
this variant saves the 'IE' bit to a 'd' register. The 'IE' bitfield
changed from ISA version 1.6.1, so we add icr_ie_offset to DisasContext
as with the other DISABLE insn.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-9-kbastian@mail.uni-paderborn.de >
2023-06-21 18:09:54 +02:00
4e3377bb5a
target/tricore: Add shuffle insn
...
this is based on code by volumit (https://github.com/volumit/qemu/ ).
Reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
and https://gitlab.com/qemu-project/qemu/-/issues/1452 .
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-7-kbastian@mail.uni-paderborn.de >
2023-06-21 18:09:48 +02:00
0eaafe33d0
target/tricore: Add crc32.b insn
...
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-6-kbastian@mail.uni-paderborn.de >
2023-06-21 17:56:45 +02:00
dc0b4368be
target/tricore: Add crc32l.w insn
...
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-5-kbastian@mail.uni-paderborn.de >
2023-06-21 17:56:45 +02:00
73f874d9fe
target/tricore: Add LHA insn
...
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-4-kbastian@mail.uni-paderborn.de >
2023-06-21 17:56:45 +02:00
fd6f446a5e
target/tricore: Add popcnt.w insn
...
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Message-Id: <20230614100039.1337971-3-kbastian@mail.uni-paderborn.de >
2023-06-21 17:56:45 +02:00
f91005e195
Supply missing header guards
...
Signed-off-by: Markus Armbruster <armbru@redhat.com >
Message-Id: <20190604181618.19980-5-armbru@redhat.com >
2019-06-12 13:20:21 +02:00
02754acd89
target/tricore: Fix LGPL version number
...
It's either "GNU *Library* General Public version 2" or "GNU Lesser
General Public version *2.1*", but there was no "version 2.0" of the
"Lesser" library. So assume that version 2.1 is meant here.
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Signed-off-by: Thomas Huth <thuth@redhat.com >
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <1548252536-6242-4-git-send-email-thuth@redhat.com >
Signed-off-by: Laurent Vivier <laurent@vivier.eu >
2019-01-30 11:01:46 +01:00
defda2d420
tricore: added some missing cpu instructions
...
Signed-off-by: David Brenken <david.brenken@efs-auto.de >
Signed-off-by: Florian Artmeier <florian.artmeier@efs-auto.de >
Signed-off-by: Georg Hofstetter <georg.hofstetter@efs-auto.de >
Message-Id: <20180301155619.8640-2-david.brenken@efs-auto.org >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
2018-03-02 11:46:23 +01:00
dedd8c9c32
target-tricore: Added new JNE instruction variant
...
If D[15] is != sign_ext(const4) then PC will be set to (PC +
zero_ext(disp4 + 16)).
[BK: fixed style errors]
Signed-off-by: Peer Adelt <peer.adelt@c-lab.de >
Message-Id: <1465314555-11501-5-git-send-email-peer.adelt@c-lab.de >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
2017-01-11 14:37:28 +01:00
550929dd46
target-tricore: Added new MOV instruction variant
...
Puts the content of data register D[a] into E[c][63:32] and the
content of data register D[b] into E[c][31:0].
[BK: fix style error]
[BK: Allocate temporaries only when needed]
Signed-off-by: Peer Adelt <peer.adelt@c-lab.de >
Message-Id: <1465314555-11501-4-git-send-email-peer.adelt@c-lab.de >
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
2017-01-11 14:37:15 +01:00
fcf5ef2ab5
Move target-* CPU file into a target/ folder
...
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.
Acked-by: Laurent Vivier <laurent@vivier.eu > [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de > [tricore part]
Acked-by: Michael Walle <michael@walle.cc > [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com > [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com > [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com > [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com > [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net > [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com > [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au > [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com > [crisµblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn > [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com >
2016-12-20 21:52:12 +01:00
