5e4ef64cfd
Simplify round/ceil/floor implementation, spotted by Fabrice Bellard.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-28 14:07:05 +00:00
e3b60f1d9e
Fix computation for ceil, floor and round instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-27 19:01:46 +00:00
8dfdb87c8d
Implement recip1/recip2/rsqrt1/rsqrt2.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26 20:26:03 +00:00
996ba2ccf5
MIPS64 improvements, based on a patch by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 17:34:33 +00:00
e034e2c39a
Handle MIPS64 SEGBITS value correctly.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-23 18:04:12 +00:00
17044c06b8
Allow emulation of 32bit targets in the MIPS64 capable qemu version.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 23:50:19 +00:00
7bfd934a13
Fix write to K0 bits in Config0, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 11:50:17 +00:00
bd04c6feb9
Change 20Kc PRID to a later version.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-12 12:43:47 +00:00
70cf0b63f1
R5k has PX implemented.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-09 12:29:32 +00:00
9467d44c4d
Move target-specific defines to the target directories.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 21:02:38 +00:00
bfed01fc79
Clean up of some target specifics in exec.c/cpu-exec.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:44:37 +00:00
3a95e3a7d9
Check for R2 instructions, and throw RI if we don't emulate R2.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-02 00:25:12 +00:00
1e3d0552f5
Update some comments, 64bit FPU support is functional regardless of
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funny non-standard fcr0 bits on earlier CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 21:57:32 +00:00
8487327a1d
Make sure hflags are updated for CP0_Status changes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 17:47:07 +00:00
c13af1ef6c
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 15:18:04 +00:00
c9c1a06457
Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.
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Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 14:58:56 +00:00
a7037b2950
Allow again FPU for usermode emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 11:47:24 +00:00
278d070272
Simplify code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 23:42:46 +00:00
33ac7f1630
Don't kill the registered irqs on reset.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 16:18:58 +00:00
924b2c07cd
Add proper float*_is_nan prototypes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 16:17:52 +00:00
51b2772f28
Fix CPU (re-)selection on reset.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-30 20:46:02 +00:00
78749ba859
Fix usermode check, thanks Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29 18:55:34 +00:00
5e755519ac
Don't check the FPU state for each FPU instruction, use hflags to
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handle this per-tb.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29 16:52:57 +00:00
6e473128b6
Handle PX/UX status flags correctly, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 20:36:48 +00:00
12a4b2aa1d
Fix ddivu for 32bit hosts, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:36:30 +00:00
c811cf2c03
Do not sign extend lwu, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:09:41 +00:00
9b9e4393dd
MIPS64 addressing fixes, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:03:28 +00:00
fd88b6abab
The 24k wants more watch and srsmap registers.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23 08:24:25 +00:00
df1561e22d
The previous patch to make breakpoints work was a performance
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disaster, use a similiar hack as ARM does instead.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23 08:18:27 +00:00
3a5b360dac
Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20 13:27:58 +00:00
93b12ccc62
Fix indexed FP load/store instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20 01:36:29 +00:00
57fa1fb31c
More MIPS 64-bit FPU support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 20:29:41 +00:00
f469b9db01
Fix slti/sltiu for MIPS64, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 17:45:43 +00:00
5d46d55d4b
Fix ldl/ldr implementation, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 17:44:33 +00:00
fd4a04ebb2
- Move FPU exception handling into helper functions, since they are big.
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- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
status bit can change.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18 11:55:54 +00:00
34ae7b51f5
Work around the lack of proper handling for self-modifying code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18 01:13:09 +00:00
69d357286d
More generic 64 bit multiplication support, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-16 11:59:40 +00:00
100ce98812
Full MIPS64 MMU implementation, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 19:22:13 +00:00
f1b0aa5de7
Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 18:39:10 +00:00
7b62f20c08
Delete misleading comment.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 15:29:26 +00:00
703eaf379e
Don't decode CP0 XContext on 32bit MIPS.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 14:42:18 +00:00
f2e9ebef12
MMU code improvements, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 14:07:26 +00:00
388bb21af6
MIPS linux-user update.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 13:58:00 +00:00
29929e3490
MIPS TLB style selection at runtime, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 13:49:44 +00:00
5a1e8ffbe7
Implemented cabs FP instructions, and improve exception handling for
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trunc/floor/ceil/round.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 17:08:26 +00:00
287c4b84f4
Another bit of nicer debug output.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 10:43:55 +00:00
fbcc68286a
Implement FP madd/msub, wire up bc1any[24][ft].
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 09:59:10 +00:00
923617a396
Improved debug output for the MIPS opcode decoder.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:16:06 +00:00
4759513bd9
Fix missing status ro mask initialization, thanks Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:02:14 +00:00
beebb570f4
Fix for the scd instruction, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-10 00:51:01 +00:00