Taylor Simpson
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af7f182127
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Hexagon (target/hexagon) bit reverse (brev) addressing
The following instructions are added
L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev)
L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev)
L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev)
L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev)
L2_loadri_pbr Rd32 = memw(Rx32++Mu2:brev)
L2_loadrd_pbr Rdd32 = memd(Rx32++Mu2:brev)
S2_storerb_pbr memb(Rx32++Mu2:brev).=.Rt32
S2_storerh_pbr memh(Rx32++Mu2:brev).=.Rt32
S2_storerf_pbr memh(Rx32++Mu2:brev).=.Rt.H32
S2_storeri_pbr memw(Rx32++Mu2:brev).=.Rt32
S2_storerd_pbr memd(Rx32++Mu2:brev).=.Rt32
S2_storerinew_pbr memw(Rx32++Mu2:brev).=.Nt8.new
S2_storerbnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new
S2_storerhnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new
Test cases in tests/tcg/hexagon/brev.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-24-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 16:03:10 -07:00 |
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Taylor Simpson
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da74cd2dce
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Hexagon (target/hexagon) add A5_ACS (vacsh)
Rxx32,Pe4 = vacsh(Rss32, Rtt32)
Add compare and select elements of two vectors
Test cases in tests/tcg/hexagon/multi_result.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-20-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 08:31:43 -07:00 |
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Taylor Simpson
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dd8705bdf5
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Hexagon (target/hexagon) add F2_sfinvsqrta
Rd32,Pe4 = sfinvsqrta(Rs32)
Square root approx
The helper packs the 2 32-bit results into a 64-bit value,
and the fGEN_TCG override unpacks them into the proper results.
Test cases in tests/tcg/hexagon/multi_result.c
FP exception tests added to tests/tcg/hexagon/fpstuff.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-19-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 08:31:43 -07:00 |
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Taylor Simpson
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d934c16d8a
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Hexagon (target/hexagon) add F2_sfrecipa instruction
Rd32,Pe4 = sfrecipa(Rs32, Rt32)
Recripocal approx
Test cases in tests/tcg/hexagon/multi_result.c
FP exception tests added to tests/tcg/hexagon/fpstuff.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-18-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 08:31:43 -07:00 |
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Taylor Simpson
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85580a6557
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Hexagon (target/hexagon) compile all debug code
Change #if HEX_DEBUG to if (HEX_DEBUG) so the debug code doesn't bit rot
Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-17-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 08:31:43 -07:00 |
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Taylor Simpson
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b3f37abdd3
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Hexagon (target/hexagon) use softfloat for float-to-int conversions
Use the proper return for helpers that convert to unsigned
Remove target/hexagon/conv_emu.[ch]
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-13-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-01 08:31:43 -07:00 |
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Taylor Simpson
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b5ed786fec
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Hexagon (target/hexagon) scalar core helpers
The majority of helpers are generated. Define the helper functions needed
then include the generated file
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <1612763186-18161-8-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-02-18 07:48:22 -08:00 |
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