ce3bc112cd
mps2-an511: Fix wiring of UART overflow interrupt lines
...
Fix an error that meant we were wiring every UART's overflow
interrupts into the same inputs 0 and 1 of the OR gate,
rather than giving each its own input.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com >
Message-id: 1505232834-20890-1-git-send-email-peter.maydell@linaro.org
2017-09-14 18:43:19 +01:00
3d75007e01
mps2: Correctly set parent bus for SCC device
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A cut-and-paste error meant that instead of setting the
qdev parent bus for the SCC device we were setting it
twice for the ARMv7M container device. Fix this bug.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 1500634509-28011-1-git-send-email-peter.maydell@linaro.org
2017-07-24 17:59:28 +01:00
3587393922
hw/arm/mps2: Add ethernet
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The MPS2 FPGA images support ethernet via a LAN9220. We use
QEMU's LAN9118 model, which is software compatible except
that it is missing the checksum-offload feature.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 1500029487-14822-9-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
2017-07-17 13:36:09 +01:00
6dbdf4ec33
hw/arm/mps2: Add SCC
...
Add the SCC to the MPS2 board models.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Message-id: 1500029487-14822-8-git-send-email-peter.maydell@linaro.org
2017-07-17 13:36:08 +01:00
3d53904a68
hw/arm/mps2: Add timers
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Add the CMSDK APB timers to the MPS2 board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Message-id: 1500029487-14822-6-git-send-email-peter.maydell@linaro.org
2017-07-17 13:36:08 +01:00
977a15f480
hw/arm/mps2: Add UARTs
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Add the UARTs to the MPS2 board models.
Unfortunately the details of the wiring of the interrupts through
various OR gates differ between AN511 and AN385 so this can't
be purely a data-driven difference.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com >
Message-id: 1500029487-14822-4-git-send-email-peter.maydell@linaro.org
2017-07-17 13:36:08 +01:00
2eb5578b47
hw/arm/mps2: Implement skeleton mps2-an385 and mps2-an511 board models
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Model the ARM MPS2/MPS2+ FPGA based development board.
The MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger
FPGA but is otherwise the same as the 2). Since the CPU itself
and most of the devices are in the FPGA, the details of the board
as seen by the guest depend significantly on the FPGA image.
We model the following FPGA images:
"mps2_an385" -- Cortex-M3 as documented in ARM Application Note AN385
"mps2_an511" -- Cortex-M3 'DesignStart' as documented in AN511
They are fairly similar but differ in the details for some
peripherals.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 1500029487-14822-2-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
2017-07-17 13:36:08 +01:00
