817e0b6fe8
pci: interrupt pin documentation update
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Fix up some erroneous comments in code:
interrupt pins are named A-D, the
interrupt pin register is always readonly
and isn't zeroed out on reset.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com >
2011-09-19 21:22:29 +03:00
145aebeca4
pcnet: fix wrong opaque (broken by bd8d6f7cad)
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Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com >
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org >
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com >
2011-08-22 10:20:10 -05:00
e824b2cc3b
pci: rename pci_register_bar_region() to pci_register_bar()
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Reviewed-by: Richard Henderson <rth@twiddle.net >
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com >
Signed-off-by: Avi Kivity <avi@redhat.com >
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com >
2011-08-08 10:22:30 -05:00
bd8d6f7cad
pcnet: convert to memory API
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Also related chips.
Reviewed-by: Richard Henderson <rth@twiddle.net >
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com >
Signed-off-by: Avi Kivity <avi@redhat.com >
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com >
2011-08-08 10:22:29 -05:00
d7dccd1168
hw/pcnet-pci.c: convert to PCIDeviceInfo to initialize ids
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use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp >
Signed-off-by: Michael S. Tsirkin <mst@redhat.com >
2011-06-12 10:33:36 +03:00
5300f1a548
Merge remote branch 'origin/master' into pci
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Conflicts:
exec.c
2011-05-05 16:39:47 +03:00
5ee8ad71e1
PXE: Use consistent naming for PXE ROMs
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And add missing ROMs to tarbin build target.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com >
2011-04-18 11:46:01 -06:00
27a4154324
pcnet-pci: convert to pci_register_bar_simple()
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Signed-off-by: Avi Kivity <avi@redhat.com >
Signed-off-by: Michael S. Tsirkin <mst@redhat.com >
2011-04-07 13:56:46 +03:00
2e55e84282
Add bootindex for option roms.
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Extend -option-rom command to have additional parameter ,bootindex=.
Signed-off-by: Gleb Natapov <gleb@redhat.com >
Signed-off-by: Blue Swirl <blauwirbel@gmail.com >
2010-12-11 21:32:47 +00:00
2507c12ab0
Add endianness as io mem parameter
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As stated before, devices can be little, big or native endian. The
target endianness is not of their concern, so we need to push things
down a level.
This patch adds a parameter to cpu_register_io_memory that allows a
device to choose its endianness. For now, all devices simply choose
native endian, because that's the same behavior as before.
Signed-off-by: Alexander Graf <agraf@suse.de >
Signed-off-by: Blue Swirl <blauwirbel@gmail.com >
2010-12-11 15:24:25 +00:00
661a1799ba
Add pcnet-pci.c
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Add file missing from last commit.
Signed-off-by: Paul Brook <paul@codesourcery.com >
2010-11-27 11:56:02 +00:00
