The ports at 0xe8..0xeb have impl.min/max_access_size == 1, so that memory accesses are split and combined by the memory core. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-29-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This writes a register and reads its 1/2/4 byte parts. Masking is done in the device model. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-25-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>