f029341494
tcg-aarch64: Set ext based on TCG_OPF_64BIT
...
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2014-03-08 21:23:09 -08:00
7763ffa017
tcg-aarch64: Change all ext variables to TCGType
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We assert that the values for _I32 and _I64 are 0 and 1 respectively.
This will make a couple of functions declared by tcg.c cleaner.
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2014-03-08 21:23:09 -08:00
3353d0dcc3
tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS check
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Removed from other targets in 56bbc2f967
.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2014-03-08 21:23:02 -08:00
9ecefc84dd
tcg: Add tcg-be-ldst.h
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Move TCGLabelQemuLdst and related stuff out of tcg.h.
Signed-off-by: Richard Henderson <rth@twiddle.net >
2013-10-10 11:44:26 -07:00
023261ef85
tcg-aarch64: Update to helper_ret_*_mmu routines
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A minimal update to use the new helpers with the return address argument.
Tested-by: Claudio Fontana <claudio.fontana@linaro.org >
Reviewed-by: Claudio Fontana <claudio.fontana@linaro.org >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2013-10-10 11:44:25 -07:00
e58eb53413
exec: Split softmmu_defs.h
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The _cmmu helpers can be moved to exec-all.h. The helpers that are
used from TCG will shortly need access to tcg_target_long so move
their declarations into tcg.h.
This requires minor include adjustments to all TCG backends.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2013-09-02 09:08:30 -07:00
a05b5b9be0
tcg: Change tcg_out_ld/st offset to intptr_t
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Reviewed-by: Aurelien Jarno <aurelien@aurel32.net >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2013-09-02 09:08:30 -07:00
2ba7fae29e
tcg: Change relocation offsets to intptr_t
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Reviewed-by: Aurelien Jarno <aurelien@aurel32.net >
Signed-off-by: Richard Henderson <rth@twiddle.net >
2013-09-02 09:08:29 -07:00
c6d8ed24b4
tcg/aarch64: Implement tlb lookup fast path
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Supports CONFIG_QEMU_LDST_OPTIMIZATION
Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com >
2013-07-15 13:13:46 +02:00
b1f6dc0d2a
tcg/aarch64: implement ldst 12bit scaled uimm offset
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implement the 12bit scaled unsigned immediate offset
variant of LDR/STR. This improves code size by avoiding
the movi + ldst_r for naturally aligned offsets in range.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
2013-07-03 14:43:11 +02:00
6a91c7c978
tcg/aarch64: implement user mode qemu ld/st
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also put aarch64 in the list of archs that do not need an ldscript.
Signed-off-by: Jani Kokkoken <jani.kokkonen@huawei.com >
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 51AF40EE.1000104@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:23 +01:00
31f1275b90
tcg/aarch64: implement sign/zero extend operations
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implement the optional sign/zero extend operations with the dedicated
aarch64 instructions.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Message-id: 51AC9A58.40502@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:23 +01:00
9c4a059df3
tcg/aarch64: implement byte swap operations
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implement the optional byte swap operations with the dedicated
aarch64 instructions.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Message-id: 51AC9A33.9050003@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:23 +01:00
7deea126b2
tcg/aarch64: implement AND/TEST immediate pattern
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add functions to AND/TEST registers with immediate patterns.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Message-id: 51AC9A0C.3090303@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:22 +01:00
36fac14a64
tcg/aarch64: improve arith shifted regs operations
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for arith operations, add SUBS, ANDS, ADDS and add a shift parameter
so that all arith instructions can make use of shifted registers.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Message-id: 51AC998B.7070506@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:22 +01:00
4a136e0a6b
tcg/aarch64: implement new TCG target for aarch64
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add preliminary support for TCG target aarch64.
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com >
Reviewed-by: Richard Henderson <rth@twiddle.net >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 51A5C596.3090108@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2013-06-12 16:20:22 +01:00