0553d895f9
Normalize position of header guard
...
This is the common header guard idiom:
/*
* File comment
*/
#ifndef GUARD_SYMBOL_H
#define GUARD_SYMBOL_H
... actual contents ...
#endif
A few of our headers have some #include before the guard.
target/tilegx/spr_def_64.h has #ifndef __DOXYGEN__ outside the guard.
A few more have the #define elsewhere.
Change them to match the common idiom. For spr_def_64.h, that means
dropping #ifndef __DOXYGEN__. While there, rename guard symbols to
make scripts/clean-header-guards.pl happy.
Signed-off-by: Markus Armbruster <armbru@redhat.com >
Message-Id: <20190604181618.19980-2-armbru@redhat.com >
[Rebased with conflicts resolved automatically]
2019-06-12 13:20:20 +02:00
84aec8efd6
net: cadence_gem: Add support for selecting the DMA MemoryRegion
...
Add support for selecting the Memory Region that the GEM
will do DMA to.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Message-id: 20181011021931.4249-7-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-10-16 17:13:49 +01:00
e48fdd9d90
net: cadence_gem: Add support for extended descriptors
...
Add support for extended descriptors with optional 64bit
addressing and timestamping. QEMU will not yet provide
timestamps (always leaving the valid timestamp bit as zero).
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com >
Message-id: 20181011021931.4249-6-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-10-16 17:13:49 +01:00
8568313f3b
net: cadence_gem: Add macro with max number of descriptor words
...
Add macro with max number of DMA descriptor words.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com >
Message-id: 20181011021931.4249-5-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-10-16 17:13:48 +01:00
f02361822f
net: cadence_gem: Use uint32_t for 32bit descriptor words
...
Use uint32_t instead of unsigned to describe 32bit descriptor words.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com >
Message-id: 20181011021931.4249-4-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-10-16 17:13:47 +01:00
a5517666b2
cadence_gem: Make the revision a property
...
Expose the Cadence GEM revision as a property.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 541324373cf87b50f8be0439a0cb89f5028b016f.1491947224.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2017-04-20 17:39:17 +01:00
e8e4994313
cadence_gem: Add support for screening
...
The Cadence GEM hardware allows incoming data to be 'screened' based on some
register values. Add support for these screens.
We also need to increase the max regs to avoid compilation failures. These new
registers are implemented in the next patch.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 73e69a8ad9fa2763e9f68f71eaf2469dd5744fcc.1469727764.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2016-09-22 18:13:07 +01:00
2bf57f73e3
cadence_gem: Add the num-priority-queues property
...
The Cadence GEM hardware supports N number priority queues, this patch is a
step towards that by adding the property to set the queues. At the moment
behaviour doesn't change as we only use queue 0.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 6543ec0d0c4bfd2678d0ed683efb197e91b17733.1469727764.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2016-09-22 18:13:07 +01:00
f49856d4e6
net: cadence_gem: Split state struct and type into header
...
Create a new header for Cadence GEM to allow using the device with
modern SoC programming conventions. The state struct needs to be
visible to embed the device in SoC containers.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com >
Tested-by: Alistair Francis <alistair.francis@xilinx.com >
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com >
Message-id: a98b5df6440c5bff8f813a26bb53ce1cfefb4c4c.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2015-05-18 16:41:11 +01:00
