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21 Commits

Author SHA1 Message Date
KONRAD Frederic
b1251db258 cadence_uart: check for serial backend before using it. 
This checks that s->chr is not NULL before using it.

Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit af52fe862f)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
 2014-08-06 14:55:49 -05:00
Peter Crosthwaite
38acd64b1c char/cadence_uart: Implement Tx flow control 
If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
1e5d8cacb7 char/cadence_uart: Delete redundant rx rst logic 
uart_rx_reset() called immediately above already does this. Remove.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 05e30826496cf2579084ed801ac0b2c0d0a3071f.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
86baecc3e4 char/cadence_uart: Use the TX fifo for transmission 
Populate the TxFIFO with the Tx data before sending. Prepares
support for proper Tx flow control implementation.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: bdf7f8af2ef02839bea18665701bc2612f7baa6f.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
d0ac820fe4 char/cadence_uart: Fix can_receive logic 
The can_receive logic was only taking into account the RxFIFO
occupancy. RxFIFO population is only used for the echo and normal modes
however. Improve the logic to correctly return the true number of
receivable characters based on the current mode:

Normal mode: RxFIFO vacancy.
Remote loopback: TxFIFO vacancy.
Echo mode: The min of the TxFIFO and RxFIFO vacancies.
Local Loopback: Return non-zero (to implement droppage)

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 36a58440c9ca5080151e95765c2c81342de8a8df.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
2152e08ad1 char/cadence_uart: Remove TX timer & add TX FIFO state 
This tx timer implementation is flawed. Despite the controller
attempting to time the guest visable assertion of the TX-empty status
bit (and corresponding interrupt) the controller is still transmitting
characters instantaneously. There is also no sense of multiple character
delay.

The only side effect of this timer is assertion of tx-empty status. So
just remove the timer completely and hold tx-empty as permanently
asserted (its reset status). This matches the actual behaviour of
instantaneous transmission.

While we are VMSD version bumping, add the tx_fifo as device state to
prepare for upcomming TxFIFO flow control. Implement the interrupt
generation logic for the TxFIFO occupancy.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 7a208a7eb8d79d6429fe28b1396c3104371807b2.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
11a239a51c char/cadence_uart: Define Missing SR/ISR fields 
Some (interrupt) status register bits relating to the TxFIFO path were
not defined. Define them. This prepares support for proper Tx data path
flow control.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 2068b963f0af8cc834c353944e9fa816d950b163.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
676f4c095d char/cadence_uart: Simplify status generation 
The status register bits are always pure functions of other device
state. Move the generation of these bits to the update_status()
function to simplify. Makes developing much easier as theres now no need
to recheck status bits on all the changes to rx/tx fifo state.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 321994929f789096975104f99c55732774be4cae.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
1e77c91e24 char/cadence_uart: s/r_fifo/rx_fifo 
Rename this field to match the many other uses of "rx". Xilinx
docmentation (UG585) also refers to this as "RxFIFO".

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 7386d7cee0ea175f7e53ed5ff045265528d34e32.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
823dd48761 char/cadence_uart: Fix reset. 
Don't reset the uart as an init step. Register the reset function as a
proper reset fn instead.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: d82cd2e65e5a6f8b6deeecb6cced61f0bf3f8c89.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
589bfb6888 char/cadence_uart: Add missing uart_update_state 
This should be rechecked on bus write accesses as such accesses may
change the underlying state that generates the interrupt. Particular
relevant for when the guest touches the interrupt status or mask.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1c250cd61b7b8de492fbc8b79b8370958a56d83b.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Peter Crosthwaite
059ca2bf0d char/cadence_uart: Mark struct fields as public/private 
As per current QOM conventions.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: a1e31bd62e9709ffb9b3efc6c120f83f30b7a660.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-01-08 19:07:21 +00:00
Stefan Weil
1246b259f8 misc: Replace 'struct QEMUTimer' by 'QEMUTimer' 
Most code already used QEMUTimer without the redundant 'struct' keyword.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
 2013-12-02 21:03:39 +04:00
Alex Bligh
bc72ad6754 aio / timers: Switch entire codebase to the new timer API 
This is an autogenerated patch using scripts/switch-timer-api.

Switch the entire code base to using the new timer API.

Note this patch may introduce some line length issues.

Signed-off-by: Alex Bligh <alex@alex.org.uk>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
 2013-08-22 19:14:24 +02:00
Andreas Färber
534f6ff925 cadence_uart: QOM cast cleanup 
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2013-07-29 21:06:27 +02:00
Peter Crosthwaite
9121d02cb3 char/cadence_uart: Fix reset for unattached instances 
commit 1db8b5efe0 introduced an issue
where QEMU would segfault if you have an unattached Cadence UART.

Fix by guarding the flush-on-reset logic on there being a qemu_chr
attachment.

Reported-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Message-id: 9009578ee10a50d994b2e10aa2840d73765f5968.1370577272.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2013-07-15 12:28:07 +01:00
Paolo Bonzini
300b1fc68c hw/c*: pass owner to memory_region_init* functions 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2013-07-04 17:42:47 +02:00
Paolo Bonzini
2c9b15cab1 memory: add owner argument to initialization functions 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2013-07-04 17:42:44 +02:00
Edgar E. Iglesias
b52df46551 cadence_uart: Handle backend tx errors 
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 2013-06-24 16:26:52 +02:00
Paolo Bonzini
dccfcd0e5f sysemu: avoid proliferation of include/ subdirectories 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2013-04-15 18:19:25 +02:00
Paolo Bonzini
49ab747f66 hw: move target-independent files to subdirectories 
This patch tackles all files that are compiled once, moving
them to subdirectories of hw/.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2013-04-08 18:13:12 +02:00