mirror of
https://github.com/mii443/qemu.git
synced 2025-12-16 17:18:49 +00:00
hw/arm/allwinner-h3: add Clock Control Unit
The Clock Control Unit is responsible for clock signal generation, configuration and distribution in the Allwinner H3 System on Chip. This commit adds support for the Clock Control Unit which emulates a simple read/write register interface. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-4-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
committed by
Peter Maydell
parent
b0c966661e
commit
fef06c8b1b
@@ -39,6 +39,7 @@
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/timer/allwinner-a10-pit.h"
|
||||
#include "hw/intc/arm_gic.h"
|
||||
#include "hw/misc/allwinner-h3-ccu.h"
|
||||
#include "target/arm/cpu.h"
|
||||
|
||||
/**
|
||||
@@ -55,6 +56,7 @@ enum {
|
||||
AW_H3_SRAM_A1,
|
||||
AW_H3_SRAM_A2,
|
||||
AW_H3_SRAM_C,
|
||||
AW_H3_CCU,
|
||||
AW_H3_PIT,
|
||||
AW_H3_UART0,
|
||||
AW_H3_UART1,
|
||||
@@ -97,6 +99,7 @@ typedef struct AwH3State {
|
||||
ARMCPU cpus[AW_H3_NUM_CPUS];
|
||||
const hwaddr *memmap;
|
||||
AwA10PITState timer;
|
||||
AwH3ClockCtlState ccu;
|
||||
GICState gic;
|
||||
MemoryRegion sram_a1;
|
||||
MemoryRegion sram_a2;
|
||||
|
||||
Reference in New Issue
Block a user