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hw/pci-host: Update PHB5 XSCOM registers

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Add new XSCOM registers introduced in PHB5.
Apply bit-masks within xscom-write methods.
Bit-masks specified using PPC_BITMASK macro.

Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-ID: <20231016175948.10869-1-saif.abrar@linux.vnet.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Saif Abrar
2023-10-16 12:59:48 -05:00
committed by Daniel Henrique Barboza
parent 0d1dcb0bb1
commit fcc63904b5
4 changed files with 60 additions and 25 deletions
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2
include/hw/pci-host/pnv_phb4.h
View File

@@ -117,7 +117,7 @@ struct PnvPHB4 {
MemoryRegion pci_regs_mr;
/* Nest registers */
#define PHB4_PEC_NEST_STK_REGS_COUNT 0x17
#define PHB4_PEC_NEST_STK_REGS_COUNT 0x18
uint64_t nest_regs[PHB4_PEC_NEST_STK_REGS_COUNT];
MemoryRegion nest_regs_mr;

4
include/hw/pci-host/pnv_phb4_regs.h
View File

@@ -77,10 +77,12 @@
#define PEC_NEST_STK_BAR_EN_PHB PPC_BIT(2)
#define PEC_NEST_STK_BAR_EN_INT PPC_BIT(3)
#define PEC_NEST_STK_DATA_FRZ_TYPE 0x15
#define PEC_NEST_STK_PBCQ_TUN_BAR 0x16
#define PEC_NEST_STK_PBCQ_SPARSE_PAGE 0x16 /* P10 */
#define PEC_NEST_STK_PBCQ_CACHE_INJ 0x17 /* P10 */
/* XSCOM PCI global registers */
#define PEC_PCI_PBAIB_HW_CONFIG 0x00
#define PEC_PCI_PBAIB_HW_OVR 0x01
#define PEC_PCI_PBAIB_READ_STK_OVR 0x02
/* XSCOM PCI per-stack registers */