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pcie: Add link speed and width fields to PCIESlot
Add fields allowing the PCIe link speed and width of a PCIESlot to be configured, with an instance_post_init callback on the root port parent class to set defaults. This allows child classes to set these via properties or via their own instance_init callback, without requiring all implementions to support arbitrary user selected values. Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Tested-by: Geoffrey McRae <geoff@hostfission.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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committed by
Michael S. Tsirkin
parent
4695a2c500
commit
ea8cfdb5d1
@ -49,6 +49,10 @@ struct PCIESlot {
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/* pci express switch port with slot */
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uint8_t chassis;
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uint16_t slot;
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PCIExpLinkSpeed speed;
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PCIExpLinkWidth width;
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QLIST_ENTRY(PCIESlot) next;
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};
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