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Give ECC controller an IRQ (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3923 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -68,7 +68,7 @@
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#define ECC_FAR0_TYPE 0x000000f0 /* Transaction type */
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#define ECC_FAR0_SIZE 0x00000700 /* Transaction size */
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#define ECC_FAR0_CACHE 0x00000800 /* Mapped cacheable */
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#define ECC_FAR0_LOCK 0x00001000 /* Error occurred in attomic cycle */
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#define ECC_FAR0_LOCK 0x00001000 /* Error occurred in atomic cycle */
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#define ECC_FAR0_BMODE 0x00002000 /* Boot mode */
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#define ECC_FAR0_VADDR 0x003fc000 /* VA[12-19] (superset bits) */
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#define ECC_FAR0_S 0x08000000 /* Supervisor mode */
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@ -90,6 +90,7 @@
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#define ECC_ADDR_MASK (ECC_SIZE - 1)
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typedef struct ECCState {
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qemu_irq irq;
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uint32_t regs[ECC_NREGS];
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} ECCState;
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@ -222,7 +223,7 @@ static void ecc_reset(void *opaque)
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s->regs[i] = 0;
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}
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void * ecc_init(target_phys_addr_t base, uint32_t version)
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void * ecc_init(target_phys_addr_t base, qemu_irq irq, uint32_t version)
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{
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int ecc_io_memory;
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ECCState *s;
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@ -232,6 +233,7 @@ void * ecc_init(target_phys_addr_t base, uint32_t version)
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return NULL;
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s->regs[0] = version;
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s->irq = irq;
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ecc_io_memory = cpu_register_io_memory(0, ecc_mem_read, ecc_mem_write, s);
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cpu_register_physical_memory(base, ECC_SIZE, ecc_io_memory);
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