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tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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committed by
Richard Henderson
parent
ba9cef7b6e
commit
97ed5ccdee
@@ -634,7 +634,7 @@ extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
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#define MMU_MODE1_SUFFIX _super
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#define MMU_MODE2_SUFFIX _user
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#define MMU_USER_IDX 2
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static inline int cpu_mmu_index (CPUMIPSState *env)
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static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch)
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{
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return env->hflags & MIPS_HFLAG_KSU;
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}
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@@ -3629,7 +3629,7 @@ FOP_CONDN_S(sne, (float32_lt(fst1, fst0, &env->active_fpu.fp_status)
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#if !defined(CONFIG_USER_ONLY)
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#define MEMOP_IDX(DF) \
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TCGMemOpIdx oi = make_memop_idx(MO_TE | DF | MO_UNALN, \
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cpu_mmu_index(env));
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cpu_mmu_index(env, false));
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#else
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#define MEMOP_IDX(DF)
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#endif
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@@ -3685,7 +3685,7 @@ void helper_msa_st_ ## TYPE(CPUMIPSState *env, uint32_t wd, \
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target_ulong addr) \
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{ \
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
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int mmu_idx = cpu_mmu_index(env); \
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int mmu_idx = cpu_mmu_index(env, false); \
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int i; \
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MEMOP_IDX(DF) \
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ensure_writable_pages(env, addr, mmu_idx, GETRA()); \
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