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Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging

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Trivial patches 20210129

# gpg: Signature made Fri 29 Jan 2021 08:32:17 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-6.0-pull-request:
  target/rx: Fix compiler errors for build with sanitizers
  net/slirp.c: Fix spelling error in error message
  tcg/tci: Restrict tci_write_reg16() to 64-bit hosts
  MAINTAINERS: Update 9pfs tree URL

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2021-01-29 10:10:43 +00:00
parent 7e7eb9f852 77182df19f
commit 5101d00d2f
4 changed files with 10 additions and 8 deletions
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12
target/rx/op_helper.c
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@@ -201,14 +201,14 @@ void helper_scmpu(CPURXState *env)
if (env->regs[3] == 0) {
return;
}
while (env->regs[3] != 0) {
do {
tmp0 = cpu_ldub_data_ra(env, env->regs[1]++, GETPC());
tmp1 = cpu_ldub_data_ra(env, env->regs[2]++, GETPC());
env->regs[3]--;
if (tmp0 != tmp1 || tmp0 == '\0') {
break;
}
}
} while (env->regs[3] != 0);
env->psw_z = tmp0 - tmp1;
env->psw_c = (tmp0 >= tmp1);
}
@@ -287,14 +287,14 @@ void helper_suntil(CPURXState *env, uint32_t sz)
if (env->regs[3] == 0) {
return ;
}
while (env->regs[3] != 0) {
do {
tmp = cpu_ldufn[sz](env, env->regs[1], GETPC());
env->regs[1] += 1 << sz;
env->regs[3]--;
if (tmp == env->regs[2]) {
break;
}
}
} while (env->regs[3] != 0);
env->psw_z = tmp - env->regs[2];
env->psw_c = (tmp <= env->regs[2]);
}
@@ -306,14 +306,14 @@ void helper_swhile(CPURXState *env, uint32_t sz)
if (env->regs[3] == 0) {
return ;
}
while (env->regs[3] != 0) {
do {
tmp = cpu_ldufn[sz](env, env->regs[1], GETPC());
env->regs[1] += 1 << sz;
env->regs[3]--;
if (tmp != env->regs[2]) {
break;
}
}
} while (env->regs[3] != 0);
env->psw_z = env->regs[3];
env->psw_c = (tmp <= env->regs[2]);
}