mirror of
https://github.com/mii443/qemu.git
synced 2025-12-16 17:18:49 +00:00
PCI: Mask writes to RO bits in the command reg of PCI config space
The Command register in the PCI config space has some read-only bits. Any writes to those bits should be masked out. Signed-off-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6092 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
Reference in New Issue
Block a user