mirror of
https://github.com/mii443/qemu.git
synced 2025-08-31 03:19:27 +00:00
target-arm: make TTBCR banked
Adds secure and non-secure bank register suport for TTBCR. Added new struct to compartmentalize the TCR data and masks. Removed old tcr/ttbcr data and added a 4 element array of the new structs in cp15. This allows for one entry per EL. Added a CP register definition for TCR_EL3. Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1416242878-876-18-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
committed by
Peter Maydell
parent
7dd8c9af0d
commit
11f136ee25
@ -153,9 +153,9 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm)
|
||||
*/
|
||||
static inline bool extended_addresses_enabled(CPUARMState *env)
|
||||
{
|
||||
return arm_el_is_aa64(env, 1)
|
||||
|| ((arm_feature(env, ARM_FEATURE_LPAE)
|
||||
&& (env->cp15.c2_control & TTBCR_EAE)));
|
||||
TCR *tcr = &env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1];
|
||||
return arm_el_is_aa64(env, 1) ||
|
||||
(arm_feature(env, ARM_FEATURE_LPAE) && (tcr->raw_tcr & TTBCR_EAE));
|
||||
}
|
||||
|
||||
/* Valid Syndrome Register EC field values */
|
||||
|
Reference in New Issue
Block a user