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This commit is contained in:
Masato Imai
2025-08-10 15:49:26 +00:00
parent 1a8f54df49
commit 52fe955b04
2 changed files with 17 additions and 6 deletions
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16
nel_os_kernel/src/vmm/x86_64/intel/msr.rs
View File

@ -3,7 +3,8 @@ use core::u64;
use alloc::vec; use alloc::vec;
use alloc::vec::Vec; use alloc::vec::Vec;
use x86::vmx::vmcs; use x86::vmx::vmcs;
use x86_64::PhysAddr; use x86_64::structures::paging::OffsetPageTable;
use x86_64::{PhysAddr, VirtAddr};
use crate::info; use crate::info;
use crate::vmm::x86_64::common::read_msr; use crate::vmm::x86_64::common::read_msr;
@ -64,6 +65,9 @@ pub fn register_msrs(vcpu: &mut IntelVCpu) -> Result<(), MsrError> {
read_msr(x86::msr::IA32_KERNEL_GSBASE), read_msr(x86::msr::IA32_KERNEL_GSBASE),
) )
.unwrap(); .unwrap();
vcpu.host_msr
.set(x86::msr::MSR_C5_PMON_BOX_CTRL, 0)
.unwrap();
vcpu.guest_msr.set(x86::msr::IA32_TSC_AUX, 0).unwrap(); vcpu.guest_msr.set(x86::msr::IA32_TSC_AUX, 0).unwrap();
vcpu.guest_msr.set(x86::msr::IA32_STAR, 0).unwrap(); vcpu.guest_msr.set(x86::msr::IA32_STAR, 0).unwrap();
@ -71,9 +75,12 @@ pub fn register_msrs(vcpu: &mut IntelVCpu) -> Result<(), MsrError> {
vcpu.guest_msr.set(x86::msr::IA32_CSTAR, 0).unwrap(); vcpu.guest_msr.set(x86::msr::IA32_CSTAR, 0).unwrap();
vcpu.guest_msr.set(x86::msr::IA32_FMASK, 0).unwrap(); vcpu.guest_msr.set(x86::msr::IA32_FMASK, 0).unwrap();
vcpu.guest_msr.set(x86::msr::IA32_KERNEL_GSBASE, 0).unwrap(); vcpu.guest_msr.set(x86::msr::IA32_KERNEL_GSBASE, 0).unwrap();
vcpu.guest_msr.set(0x1b, 0).unwrap(); vcpu.guest_msr
.set(x86::msr::MSR_C5_PMON_BOX_CTRL, 0)
.unwrap();
/*vcpu.guest_msr.set(0x1b, 0).unwrap();
vcpu.guest_msr.set(0xc0010007, 0).unwrap(); vcpu.guest_msr.set(0xc0010007, 0).unwrap();
vcpu.guest_msr.set(0xc0010117, 0).unwrap(); vcpu.guest_msr.set(0xc0010117, 0).unwrap();*/
vmwrite( vmwrite(
vmcs::control::VMEXIT_MSR_LOAD_ADDR_FULL, vmcs::control::VMEXIT_MSR_LOAD_ADDR_FULL,
@ -90,6 +97,7 @@ pub fn register_msrs(vcpu: &mut IntelVCpu) -> Result<(), MsrError> {
vcpu.guest_msr.phys().as_u64(), vcpu.guest_msr.phys().as_u64(),
) )
.unwrap(); .unwrap();
Ok(()) Ok(())
} }
@ -169,7 +177,7 @@ impl ShadowMsr {
} }
pub fn phys(&self) -> PhysAddr { pub fn phys(&self) -> PhysAddr {
PhysAddr::new((&self.ents as *const Vec<SavedMsr>) as u64) PhysAddr::new(VirtAddr::from_ptr(&self.ents).as_u64())
} }
pub fn concat(r1: u64, r2: u64) -> u64 { pub fn concat(r1: u64, r2: u64) -> u64 {

7
nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs
View File

@ -2,6 +2,7 @@ use core::arch::naked_asm;
use raw_cpuid::cpuid; use raw_cpuid::cpuid;
use x86_64::{ use x86_64::{
registers::control::Cr4Flags,
structures::paging::{FrameAllocator, Size4KiB}, structures::paging::{FrameAllocator, Size4KiB},
VirtAddr, VirtAddr,
}; };
@ -71,6 +72,7 @@ impl IntelVCpu {
info!(" Reason: unknown ({})", reason); info!(" Reason: unknown ({})", reason);
} }
} }
return Err("VMEntry failure");
} else { } else {
let basic_reason = (exit_reason_raw & 0xFFFF) as u16; let basic_reason = (exit_reason_raw & 0xFFFF) as u16;
let exit_reason: VmxExitReason = basic_reason.try_into().unwrap(); let exit_reason: VmxExitReason = basic_reason.try_into().unwrap();
@ -155,12 +157,13 @@ impl IntelVCpu {
controls::setup_exit_controls()?; controls::setup_exit_controls()?;
Self::setup_host_state()?; Self::setup_host_state()?;
self.setup_guest_state()?; self.setup_guest_state()?;
msr::register_msrs(self).map_err(|_| "MSR error")?;
self.init_guest_memory(frame_allocator)?; self.init_guest_memory(frame_allocator)?;
common::linux::load_kernel(self)?; common::linux::load_kernel(self)?;
msr::register_msrs(self).map_err(|_| "MSR error")?;
Ok(()) Ok(())
} }
@ -242,7 +245,7 @@ impl IntelVCpu {
vmwrite(vmcs::guest::CR3, unsafe { cr3() })?; vmwrite(vmcs::guest::CR3, unsafe { cr3() })?;
vmwrite( vmwrite(
vmcs::guest::CR4, vmcs::guest::CR4,
unsafe { cr4() }.bits() as u64, /*vmread(vmcs::guest::CR4)? & !Cr4Flags::VIRTUAL_MACHINE_EXTENSIONS.bits()*/ vmread(vmcs::guest::CR4)? | !Cr4Flags::VIRTUAL_MACHINE_EXTENSIONS.bits(),
)?; )?;
vmwrite(vmcs::guest::CS_BASE, 0)?; vmwrite(vmcs::guest::CS_BASE, 0)?;