From 47a434171cd11eed7ea5a94aa93eef80feb3a0a5 Mon Sep 17 00:00:00 2001 From: Masato Imai Date: Wed, 6 Aug 2025 08:10:18 +0000 Subject: [PATCH] hlt --- .../src/vmm/x86_64/intel/controls.rs | 28 +++++------- nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs | 44 ++++++++++++++----- .../src/vmm/x86_64/intel/vmcs/segment.rs | 4 +- 3 files changed, 46 insertions(+), 30 deletions(-) diff --git a/nel_os_kernel/src/vmm/x86_64/intel/controls.rs b/nel_os_kernel/src/vmm/x86_64/intel/controls.rs index f403e6a..8e60950 100644 --- a/nel_os_kernel/src/vmm/x86_64/intel/controls.rs +++ b/nel_os_kernel/src/vmm/x86_64/intel/controls.rs @@ -16,7 +16,7 @@ pub fn setup_exec_controls() -> Result<(), &'static str> { raw_pin_exec_ctrl &= (reserved_bits >> 32) as u32; let mut pin_exec_ctrl = vmcs::controls::PinBasedVmExecutionControls::from(raw_pin_exec_ctrl); - pin_exec_ctrl.set_external_interrupt_exiting(false); + //pin_exec_ctrl.set_external_interrupt_exiting(false); pin_exec_ctrl.write()?; @@ -34,15 +34,11 @@ pub fn setup_exec_controls() -> Result<(), &'static str> { let mut primary_exec_ctrl = vmcs::controls::PrimaryProcessorBasedVmExecutionControls::from(raw_primary_exec_ctrl); primary_exec_ctrl.set_hlt(true); - primary_exec_ctrl.set_activate_secondary_controls(true); - primary_exec_ctrl.set_use_tpr_shadow(false); - primary_exec_ctrl.set_use_msr_bitmap(false); - primary_exec_ctrl.set_unconditional_io(false); - primary_exec_ctrl.set_use_io_bitmap(false); // TODO: true + primary_exec_ctrl.set_activate_secondary_controls(false); primary_exec_ctrl.write()?; - let mut raw_secondary_exec_ctrl = + /*let mut raw_secondary_exec_ctrl = u32::from(vmcs::controls::SecondaryProcessorBasedVmExecutionControls::read()?); let reserved_bits = if basic_msr & (1 << 55) != 0 { @@ -61,8 +57,8 @@ pub fn setup_exec_controls() -> Result<(), &'static str> { secondary_exec_ctrl.write()?; - vmwrite(0x6000, u64::MAX)?; - vmwrite(0x6002, u64::MAX)?; + vmwrite(0x6000, 0)?; + vmwrite(0x6002, 0)?;*/ Ok(()) } @@ -80,9 +76,9 @@ pub fn setup_entry_controls() -> Result<(), &'static str> { raw_entry_ctrl &= (reserved_bits >> 32) as u32; let mut entry_ctrl = vmcs::controls::EntryControls::from(raw_entry_ctrl); - entry_ctrl.set_ia32e_mode_guest(false); - entry_ctrl.set_load_ia32_efer(true); - entry_ctrl.set_load_ia32_pat(true); + entry_ctrl.set_ia32e_mode_guest(true); + /*entry_ctrl.set_load_ia32_efer(true); + entry_ctrl.set_load_ia32_pat(true);*/ entry_ctrl.write()?; @@ -103,14 +99,14 @@ pub fn setup_exit_controls() -> Result<(), &'static str> { let mut exit_ctrl = vmcs::controls::PrimaryExitControls::from(raw_exit_ctrl); exit_ctrl.set_host_addr_space_size(true); - exit_ctrl.set_save_ia32_efer(true); - exit_ctrl.set_save_ia32_pat(true); + /*exit_ctrl.set_save_ia32_efer(true); + exit_ctrl.set_save_ia32_pat(true);*/ exit_ctrl.set_load_ia32_efer(true); - exit_ctrl.set_load_ia32_pat(true); + //exit_ctrl.set_load_ia32_pat(true); exit_ctrl.write()?; - vmwrite(0x4004, 1u64 << 6)?; // EXCEPTION_BITMAP + //vmwrite(0x4004, 1u64 << 6)?; // EXCEPTION_BITMAP Ok(()) } diff --git a/nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs b/nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs index 0bf8944..ec65fa2 100644 --- a/nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs +++ b/nel_os_kernel/src/vmm/x86_64/intel/vcpu.rs @@ -127,7 +127,7 @@ impl IntelVCpu { vmwrite(vmcs::host::CR3, unsafe { cr3() })?; vmwrite( vmcs::host::CR4, - unsafe { cr4() }.bits() as u64 | Cr4Flags::OSXSAVE.bits(), + unsafe { cr4() }.bits() as u64, /* | Cr4Flags::OSXSAVE.bits()*/ )?; vmwrite( @@ -168,18 +168,16 @@ impl IntelVCpu { fn setup_guest_state() -> Result<(), &'static str> { use x86::{controlregs::*, vmx::vmcs}; - let cr0 = (Cr0::empty() + let cr0 = unsafe { cr0() }/*(Cr0::empty() | Cr0::CR0_PROTECTED_MODE | Cr0::CR0_NUMERIC_ERROR | Cr0::CR0_EXTENSION_TYPE) - & !Cr0::CR0_ENABLE_PAGING; + & !Cr0::CR0_ENABLE_PAGING*/; vmwrite(vmcs::guest::CR0, cr0.bits() as u64)?; - vmwrite(vmcs::guest::CR3, 0)?; + vmwrite(vmcs::guest::CR3, unsafe { cr3() })?; vmwrite( vmcs::guest::CR4, - vmread(vmcs::guest::CR4)? - | Cr4Flags::VIRTUAL_MACHINE_EXTENSIONS.bits() - & !Cr4Flags::PHYSICAL_ADDRESS_EXTENSION.bits(), + unsafe { cr4() }.bits() as u64, /*vmread(vmcs::guest::CR4)? & !Cr4Flags::VIRTUAL_MACHINE_EXTENSIONS.bits()*/ )?; vmwrite(vmcs::guest::CS_BASE, 0)?; @@ -209,8 +207,8 @@ impl IntelVCpu { .with_desc_type(DescriptorType::Code) .with_dpl(0) .with_granularity(Granularity::KByte) - .with_long(false) - .with_db(true); + .with_long(true) + .with_db(false); let ds_right = SegmentRights::default() .with_rw(true) @@ -255,7 +253,10 @@ impl IntelVCpu { u32::from(ldtr_right) as u64, )?; - vmwrite(vmcs::guest::CS_SELECTOR, 0)?; + vmwrite( + vmcs::guest::CS_SELECTOR, + x86::segmentation::cs().bits() as u64, + )?; vmwrite(vmcs::guest::SS_SELECTOR, 0)?; vmwrite(vmcs::guest::DS_SELECTOR, 0)?; vmwrite(vmcs::guest::ES_SELECTOR, 0)?; @@ -266,8 +267,7 @@ impl IntelVCpu { vmwrite(vmcs::guest::FS_BASE, 0)?; vmwrite(vmcs::guest::GS_BASE, 0)?; - vmwrite(vmcs::guest::IA32_EFER_FULL, 0)?; - vmwrite(vmcs::guest::IA32_EFER_HIGH, 0)?; + vmwrite(vmcs::guest::IA32_EFER_FULL, read_msr(x86::msr::IA32_EFER))?; vmwrite(vmcs::guest::RFLAGS, 0x2)?; vmwrite(vmcs::guest::LINK_PTR_FULL, u64::MAX)?; @@ -277,6 +277,26 @@ impl IntelVCpu { //vmwrite(vmcs::control::CR0_READ_SHADOW, vmread(vmcs::guest::CR0)?)?; //vmwrite(vmcs::control::CR4_READ_SHADOW, vmread(vmcs::guest::CR4)?)?; + info!("Guest State Check (Extended):"); + info!(" CR0: {:#x}", vmread(vmcs::guest::CR0)?); + info!(" CR3: {:#x}", vmread(vmcs::guest::CR3)?); + info!(" CR4: {:#x}", vmread(vmcs::guest::CR4)?); + info!(" EFER: {:#x}", vmread(vmcs::guest::IA32_EFER_FULL)?); + info!( + " CS: sel={:#x}, base={:#x}, limit={:#x}, ar={:#x}", + vmread(vmcs::guest::CS_SELECTOR)?, + vmread(vmcs::guest::CS_BASE)?, + vmread(vmcs::guest::CS_LIMIT)?, + vmread(vmcs::guest::CS_ACCESS_RIGHTS)? + ); + info!( + " TR: sel={:#x}, base={:#x}, limit={:#x}, ar={:#x}", + vmread(vmcs::guest::TR_SELECTOR)?, + vmread(vmcs::guest::TR_BASE)?, + vmread(vmcs::guest::TR_LIMIT)?, + vmread(vmcs::guest::TR_ACCESS_RIGHTS)? + ); + Ok(()) } } diff --git a/nel_os_kernel/src/vmm/x86_64/intel/vmcs/segment.rs b/nel_os_kernel/src/vmm/x86_64/intel/vmcs/segment.rs index 815502b..56c97bb 100644 --- a/nel_os_kernel/src/vmm/x86_64/intel/vmcs/segment.rs +++ b/nel_os_kernel/src/vmm/x86_64/intel/vmcs/segment.rs @@ -30,7 +30,7 @@ pub struct SegmentRights { pub db: bool, #[bits = 1] pub granularity: Granularity, - pub usable: bool, + pub unusable: bool, reserved2: B15, } @@ -41,6 +41,6 @@ impl Default for SegmentRights { .with_present(true) .with_avl(false) .with_long(false) - .with_usable(false) + .with_unusable(false) } }