add VMCS exit ctrls

src/main.rs

@@ -9,6 +9,7 @@
 extern crate alloc;
 
 use bootloader::{entry_point, BootInfo};
+use core::arch::asm;
 use core::panic::PanicInfo;
 use nel_os::{
     allocator, info,
@@ -61,6 +62,7 @@ fn kernel_main(boot_info: &'static BootInfo) -> ! {
     info!("vmlaunch...");
 
     unsafe {
+        asm!("cli");
         let vmlaunch = vmx::vmlaunch();
 
         if vmlaunch.is_err() {

src/vmm/vcpu.rs

@@ -47,6 +47,7 @@ impl VCpu {
         self.reset_vmcs().unwrap();
         self.setup_exec_ctrls().unwrap();
         self.setup_entry_ctrls().unwrap();
+        self.setup_exit_ctrls().unwrap();
         self.setup_host_state().unwrap();
         self.setup_guest_state().unwrap();
     }
@@ -104,6 +105,27 @@ impl VCpu {
         Ok(())
     }
 
+    pub fn setup_exit_ctrls(&mut self) -> Result<(), VmFail> {
+        info!("Setting up exit controls");
+
+        let basic_msr = unsafe { rdmsr(x86::msr::IA32_VMX_BASIC) };
+
+        let mut exit_ctrl = EntryControls::read();
+
+        let reserved_bits = if basic_msr & (1 << 55) != 0 {
+            unsafe { rdmsr(x86::msr::IA32_VMX_TRUE_EXIT_CTLS) }
+        } else {
+            unsafe { rdmsr(x86::msr::IA32_VMX_EXIT_CTLS) }
+        };
+
+        exit_ctrl.0 |= (reserved_bits & 0xFFFFFFFF) as u32;
+        exit_ctrl.0 &= (reserved_bits >> 32) as u32;
+
+        exit_ctrl.write();
+
+        Ok(())
+    }
+
     pub fn setup_host_state(&mut self) -> Result<(), VmFail> {
         info!("Setting up host state");
         unsafe {

src/vmm/vmcs.rs

@@ -255,6 +255,47 @@ impl EntryControls {
     }
 }
 
+bitfield! {
+    pub struct PrimaryExitControls(u32);
+    impl Debug;
+
+    pub save_debug, set_save_debug: 2;
+    pub host_addr_space_size, set_host_addr_space_size: 9;
+    pub load_perf_global_ctrl, set_load_perf_global_ctrl: 13;
+    pub ack_interrupt_onexit, set_ack_interrupt_onexit: 15;
+    pub save_ia32_pat, set_save_ia32_pat: 18;
+    pub load_ia32_pat, set_load_ia32_pat: 19;
+    pub save_ia32_efer, set_save_ia32_efer: 20;
+    pub load_ia32_efer, set_load_ia32_efer: 21;
+    pub save_vmx_preemption_timer, set_save_vmx_preemption_timer: 22;
+    pub clear_ia32_bndcfgs, set_clear_ia32_bndcfgs: 23;
+    pub conceal_vmx_from_pt, set_conceal_vmx_from_pt: 24;
+    pub clear_ia32_rtit_ctl, set_clear_ia32_rtit_ctl: 25;
+    pub clear_ia32_lbr_ctl, set_clear_ia32_lbr_ctl: 26;
+    pub clear_uinv, set_clear_uinv: 27;
+    pub load_cet_state, set_load_cet_state: 28;
+    pub load_pkrs, set_load_pkrs: 29;
+    pub save_perf_global_ctl, set_save_perf_global_ctl: 30;
+    pub activate_secondary_controls, set_activate_secondary_controls: 31;
+}
+
+impl PrimaryExitControls {
+    pub fn read() -> Self {
+        let err = VmcsControl32::PRIMARY_VM_EXIT_CONTROLS.read();
+        if err.is_err() {
+            panic!("Failed to read Primary VM Exit Controls");
+        }
+        let err = err.unwrap();
+        PrimaryExitControls(err)
+    }
+
+    pub fn write(&self) {
+        VmcsControl32::PRIMARY_VM_EXIT_CONTROLS
+            .write(self.0)
+            .expect("Failed to write Primary VM Exit Controls");
+    }
+}
+
 pub enum VmcsControl32 {
     PIN_BASED_VM_EXECUTION_CONTROLS = 0x00004000,
     PRIMARY_PROCESSOR_BASED_VM_EXECUTION_CONTROLS = 0x00004002,