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This commit is contained in:
Masato Imai
2025-05-17 05:29:56 +00:00
parent 37a367a736
commit 6584d8dab6
2 changed files with 3 additions and 5 deletions
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4
src/vmm/cpuid.rs
View File

@ -4,7 +4,9 @@ use super::{vcpu::VCpu, vmcs::VmxLeaf};
pub fn handle_cpuid_exit(vcpu: &mut VCpu) { pub fn handle_cpuid_exit(vcpu: &mut VCpu) {
let regs = &mut vcpu.guest_registers; let regs = &mut vcpu.guest_registers;
let vendor: &[u8; 12] = b"miHypervisor"; //let vendor: &[u8; 12] = b"miHypervisor";
let vendor: &[u8; 12] = b"KVMKVMKVMKVM";
let vendor = unsafe { core::mem::transmute::<&[u8; 12], &[u32; 3]>(vendor) }; let vendor = unsafe { core::mem::transmute::<&[u8; 12], &[u32; 3]>(vendor) };
match VmxLeaf::from(regs.rax) { match VmxLeaf::from(regs.rax) {
VmxLeaf::EXTENDED_FEATURE => match regs.rcx { VmxLeaf::EXTENDED_FEATURE => match regs.rcx {

4
src/vmm/vcpu.rs
View File

@ -632,22 +632,18 @@ impl VCpu {
info!("HLT instruction executed"); info!("HLT instruction executed");
} }
VmxExitReason::CPUID => { VmxExitReason::CPUID => {
info!("CPUID instruction executed");
cpuid::handle_cpuid_exit(self); cpuid::handle_cpuid_exit(self);
self.step_next_inst().unwrap(); self.step_next_inst().unwrap();
} }
VmxExitReason::RDMSR => { VmxExitReason::RDMSR => {
info!("RDMSR instruction executed");
msr::ShadowMsr::handle_rdmsr_vmexit(self); msr::ShadowMsr::handle_rdmsr_vmexit(self);
self.step_next_inst().unwrap(); self.step_next_inst().unwrap();
} }
VmxExitReason::WRMSR => { VmxExitReason::WRMSR => {
info!("WRMSR instruction executed");
msr::ShadowMsr::handle_wrmsr_vmexit(self); msr::ShadowMsr::handle_wrmsr_vmexit(self);
self.step_next_inst().unwrap(); self.step_next_inst().unwrap();
} }
VmxExitReason::CONTROL_REGISTER_ACCESSES => { VmxExitReason::CONTROL_REGISTER_ACCESSES => {
info!("Control register access");
let qual = unsafe { vmread(vmcs::ro::EXIT_QUALIFICATION).unwrap() }; let qual = unsafe { vmread(vmcs::ro::EXIT_QUALIFICATION).unwrap() };
let qual = QualCr(qual); let qual = QualCr(qual);
cr::handle_cr_access(self, &qual); cr::handle_cr_access(self, &qual);