From 4e3e8e381351a1646ac0d8f19aa4389eb9ad2371 Mon Sep 17 00:00:00 2001
From: Masato Imai <mii@sfc.wide.ad.jp>
Date: Tue, 22 Apr 2025 10:21:13 +0000
Subject: [PATCH] fix VMCS controls

---
 src/vmm/vcpu.rs | 14 +++++++++++---
 src/vmm/vmcs.rs | 28 +++++++++++++++++++++++++++-
 2 files changed, 38 insertions(+), 4 deletions(-)

diff --git a/src/vmm/vcpu.rs b/src/vmm/vcpu.rs
index 110e8f8..dfcc34d 100644
--- a/src/vmm/vcpu.rs
+++ b/src/vmm/vcpu.rs
@@ -12,7 +12,10 @@ use core::arch::naked_asm;
 use crate::{
     info,
     memory::BootInfoFrameAllocator,
-    vmm::vmcs::{DescriptorType, EntryControls, Granularity, SegmentRights},
+    vmm::vmcs::{
+        DescriptorType, EntryControls, Granularity, PrimaryExitControls,
+        PrimaryProcessorBasedVmExecutionControls, SegmentRights,
+    },
 };
 
 use super::{
@@ -68,7 +71,7 @@ impl VCpu {
 
         pin_exec_ctrl.write();
 
-        let mut primary_exec_ctrl = PinBasedVmExecutionControls::read();
+        let mut primary_exec_ctrl = PrimaryProcessorBasedVmExecutionControls::read();
 
         let reserved_bits = if basic_msr & (1 << 55) != 0 {
             unsafe { rdmsr(x86::msr::IA32_VMX_TRUE_PROCBASED_CTLS) }
@@ -78,6 +81,8 @@ impl VCpu {
 
         primary_exec_ctrl.0 |= (reserved_bits & 0xFFFFFFFF) as u32;
         primary_exec_ctrl.0 &= (reserved_bits >> 32) as u32;
+        primary_exec_ctrl.set_hlt(false);
+        primary_exec_ctrl.set_activate_secondary_controls(false);
 
         primary_exec_ctrl.write();
 
@@ -99,6 +104,7 @@ impl VCpu {
 
         entry_ctrl.0 |= (reserved_bits & 0xFFFFFFFF) as u32;
         entry_ctrl.0 &= (reserved_bits >> 32) as u32;
+        entry_ctrl.set_ia32e_mode_guest(true);
 
         entry_ctrl.write();
 
@@ -110,7 +116,7 @@ impl VCpu {
 
         let basic_msr = unsafe { rdmsr(x86::msr::IA32_VMX_BASIC) };
 
-        let mut exit_ctrl = EntryControls::read();
+        let mut exit_ctrl = PrimaryExitControls::read();
 
         let reserved_bits = if basic_msr & (1 << 55) != 0 {
             unsafe { rdmsr(x86::msr::IA32_VMX_TRUE_EXIT_CTLS) }
@@ -120,6 +126,8 @@ impl VCpu {
 
         exit_ctrl.0 |= (reserved_bits & 0xFFFFFFFF) as u32;
         exit_ctrl.0 &= (reserved_bits >> 32) as u32;
+        exit_ctrl.set_host_addr_space_size(true);
+        exit_ctrl.set_load_ia32_efer(true);
 
         exit_ctrl.write();
 
diff --git a/src/vmm/vmcs.rs b/src/vmm/vmcs.rs
index 35fb01f..37e157d 100644
--- a/src/vmm/vmcs.rs
+++ b/src/vmm/vmcs.rs
@@ -171,7 +171,33 @@ impl PinBasedVmExecutionControls {
     }
 }
 
-pub struct PrimaryProcessorBasedVmExecutionControls(pub u32);
+bitfield! {
+    pub struct PrimaryProcessorBasedVmExecutionControls(u32);
+    impl Debug;
+
+    pub interrupt_window, set_interrupt_window: 2;
+    pub tsc_offsetting, set_tsc_offsetting: 3;
+    pub hlt, set_hlt: 7;
+    pub invlpg, set_invlpg: 9;
+    pub mwait, set_mwait: 10;
+    pub rdpmc, set_rdpmc: 11;
+    pub rdtsc, set_rdtsc: 12;
+    pub cr3load, set_cr3load: 15;
+    pub cr3store, set_cr3store: 16;
+    pub activate_teritary_controls, set_activate_teritary_controls: 17;
+    pub cr8load, set_cr8load: 19;
+    pub cr8store, set_cr8store: 20;
+    pub use_tpr_shadow, set_use_tpr_shadow: 21;
+    pub nmi_window, set_nmi_window: 22;
+    pub mov_dr, set_mov_dr: 23;
+    pub unconditional_io, set_unconditional_io: 24;
+    pub use_io_bitmap, set_use_io_bitmap: 25;
+    pub monitor_trap, set_monitor_trap: 27;
+    pub use_msr_bitmap, set_use_msr_bitmap: 28;
+    pub monitor, set_monitor: 29;
+    pub pause, set_pause: 30;
+    pub activate_secondary_controls, set_activate_secondary_controls: 31;
+}
 
 impl PrimaryProcessorBasedVmExecutionControls {
     pub fn read() -> Self {